參數(shù)資料
型號： LTC2414CGN
廠商： LINEAR TECHNOLOGY CORP
元件分類： ADC
英文描述： 8-/16-Channel 24-Bit No Latency TM ADCs
中文描述： 8-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28
封裝： 0.150 INCH, PLASTIC, SSOP-28
文件頁數(shù)： 27/48頁
文件大小： 775K
代理商： LTC2414CGN
LTC2414/LTC2418
27
241418fa
C
IN
2414/18 F12
V
INCM
+ 0.5V
IN
R
SOURCE
IN
+
LTC2414/
LTC2418
C
PAR
C
IN
V
INCM
– 0.5V
IN
R
SOURCE
IN
–
C
PAR
R
SOURCE
(
)
1
10
100
1k
10k
100k
+
R
)
2414/18 F13
50
40
30
20
10
0
V
= 5V
REF
+
= 5V
REF
–
= GND
IN
+
= 3.75V
IN
–
= 1.25V
F
O
= GND
T
A
= 25
°
C
C
IN
= 0.01
μ
F
C
IN
= 0.001
μ
F
C
IN
= 100pF
C
IN
= 0pF
R
SOURCE
(
)
1
10
100
1k
10k
100k
–
R
)
2414/18 F14
0
–10
–20
–30
–40
–50
V
= 5V
REF
+
= 5V
REF
–
= GND
IN
+
= 1.25V
IN
–
= 3.75V
F
O
= GND
T
A
= 25
°
C
C
IN
= 0.01
μ
F
C
IN
= 0.001
μ
F
C
IN
= 100pF
C
IN
= 0pF
Figure 12. An RC Network at IN
+
and IN
–
Figure 13. +FS Error vs R
SOURCE
at IN
+
or IN
–
(Small C
IN
)
Figure 14. –FS Error vs R
SOURCE
at IN
+
or IN
–
(Small C
IN
)
APPLICATIOU
W
U
U
typical differential input resistance is 1.8M
which will
generate a gain error of approximately 0.28ppm for each
ohm of source resistance driving IN
+
or IN
–
. When F
O
=
HIGH (internal oscillator and 50Hz notch), the typical
differential input resistance is 2.16M
which will generate
a gain error of approximately 0.23ppm for each ohm of
source resistance driving IN
+
or IN
–
. When F
O
is driven by
an external oscillator with a frequency f
EOSC
(external
conversion clock operation), the typical differential input
resistance is 0.28 10
12
/f
EOSC
and each ohm of
source resistance driving IN
+
or IN
–
will result in
1.78 10
–6
f
EOSC
ppm gain error. The effect of the source
resistance on the two input pins is additive with respect to
this gain error. The typical +FS and –FS errors as a function
of the sum of the source resistance seen by IN
+
and IN
–
for
large values of C
IN
are shown in Figures 15 and 16.
In addition to this gain error, an offset error term may also
appear. The offset error is proportional with the mismatch
between the source impedance driving the two input pins
IN
+
and IN
–
and with the difference between the input and
reference common mode voltages. While the input drive
circuit nonzero source impedance combined with the
converter average input current will not degrade the INL
performance, indirect distortion may result from the modu-
lation of the offset error by the common mode component
of the input signal. Thus, when using large C
IN
capacitor
values, it is advisable to carefully match the source imped-
ance seen by the IN
+
and IN
–
pins. When F
O
= LOW (internal
oscillator and 60Hz notch), every 1
mismatch in source
impedance transforms a full-scale common mode input
signal into a differential mode input signal of 0.28ppm.
When F
O
= HIGH (internal oscillator and 50Hz notch), every
1
mismatch in source impedance transforms a full-scale
common mode input signal into a differential mode input
signal of 0.23ppm. When F
O
is driven by an external
oscillator with a frequency f
EOSC
, every 1
mismatch in
source impedance transforms a full-scale common
mode input signal into a differential mode input signal of
相關PDF資料
PDF描述
LTC2414IGN 8-/16-Channel 24-Bit No Latency TM ADCs
LTC2418CGN 8-/16-Channel 24-Bit No Latency TM ADCs
LTC2418IGN 8-/16-Channel 24-Bit No Latency TM ADCs
LTC2415-1CGN 24-Bit No Latency ADCs with Differential Input and Differential Reference
LTC2415-1IGN 24-Bit No Latency ADCs with Differential Input and Differential Reference
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