resistance driving the " />
參數(shù)資料
型號(hào)： LTC2413CGN#TR
廠商： Linear Technology
文件頁(yè)數(shù)： 21/44頁(yè)
文件大小： 0K
描述： IC ADC 24BIT 50/60HZ MPWR 16SSOP
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 24
采樣率（每秒）： 6.8
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 1mW
電壓電源： 單電源
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 16-SSOP（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 16-SSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個(gè)差分，雙極
LTC2413
28
sn2413 2413fs
APPLICATIO S I FOR ATIO
WU
U
Figure 27 shows the typical INL error due to the source
resistance driving the REF+ or REF– pins when large CREF
values are used. The effect of the source resistance on the
two reference pins is additive with respect to this INL error.
In general, matching of source impedance for the REF+
and REF– pins does not help the gain or the INL error. The
user is thus advised to minimize the combined source
impedance driving the REF+ and REF– pins rather than to
try to match it.
The magnitude of the dynamic reference current depends
upon the size of the very stable internal sampling capaci-
tors and upon the accuracy of the converter sampling
clock. The accuracy of the internal clock over the entire
temperature and power supply range is typical better than
0.5%. Such a specification can also be easily achieved by
an external clock. When relatively stable resistors
(50ppm/
°C) are used for the external source impedance
seen by REF+ and REF–, the expected drift of the dynamic
current gain error will be insignificant (about 1% of its
value over the entire temperature and voltage range). Even
for the most stringent applications, a one-time calibration
operation may be sufficient.
In addition to the reference sampling charge, the reference
pins ESD protection diodes have a temperature dependent
leakage current. This leakage current, nominally 1nA
(
±10nA max), results in a small gain error. A 100 source
resistance will create a 0.05
V typical and 0.5V maxi-
mum full-scale error.
Figure 23. +FS Error vs RSOURCE at REF+ or REF– (Small CREF)
Figure 24. –FS Error vs RSOURCE at REF+ or REF– (Small CREF)
Figure 25. +FS Error vs RSOURCE at REF+ or REF– (Large CREF)
Figure 26. –FS Error vs RSOURCE at REF+ or REF– (Large CREF)
RSOURCE ()
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
+FS
ERROR
(ppm
OF
V
REF
)
2413 F23
0
–10
–20
–30
–40
–50
VCC = 5V
REF+ = 5V
REF – = GND
IN+ = 5V
IN – = 2.5V
FO = GND
TA = 25°C
CREF = 0.01F
CREF = 0.001F
CREF = 100pF
CREF = 0pF
RSOURCE ()
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
–
FS
ERROR
(ppm
OF
V
REF
)
2413 F24
50
40
30
20
10
0
VCC = 5V
REF+ = 5V
REF – = GND
IN+ = GND
IN – = 2.5V
FO = GND
TA = 25°C
CREF = 0.01F
CREF = 0.001F
CREF = 100pF
CREF = 0pF
RSOURCE ()
0 100 200 300 400 500 600 700 800 900 1000
+
FS
ERROR
(ppm
OF
V
REF
)
2413 F25
0
–90
–180
–270
–360
–450
VCC = 5V
REF+ = 5V
REF– = GND
IN+ = 3.75V
IN – = 1.25V
FO = GND
TA = 25°C
CREF = 0.01F
CREF = 0.1F
CREF = 1F, 10F
RSOURCE ()
0 100 200 300 400 500 600 700 800 900 1000
–
FS
ERROR
(ppm
OF
V
REF
)
2413 F26
450
360
270
180
90
0
VCC = 5V
REF+ = 5V
REF– = GND
IN+ = 1.25V
IN – = 3.75V
FO = GND
TA = 25°C
CREF = 0.01F
CREF = 0.1F
CREF = 1F, 10F
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