參數(shù)資料
型號(hào)： LTC2410IGN
廠商： Linear Technology
文件頁(yè)數(shù)： 24/48頁(yè)
文件大?。?/td> 0K
描述： IC A/D CONV 24BIT MICRPWR 16SSOP
標(biāo)準(zhǔn)包裝： 100
位數(shù)： 24
采樣率（每秒）： 7.5
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 1mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-SSOP（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 16-SSOP
包裝： 管件
輸入數(shù)目和類型： 1 個(gè)差分，雙極
配用： DC575A-ND - BOARD DELTA SIGMA ADC LTC2410
其它名稱： Q1138645
LTC2410
30
APPLICATIO S I FOR ATIO
WU
U
ity. Typical measured performance curves for output data
rates up to 100 readings per second are shown in Fig-
ures 27, 28, 29, 30, 31, 32, 33 and 34. In order to obtain
the highest possible level of accuracy from this converter
at output data rates above 20 readings per second, the
user is advised to maximize the power supply voltage used
and to limit the maximum ambient operating temperature.
In certain circumstances, a reduction of the differential
reference voltage may be beneficial.
Input Bandwidth
The combined effect of the internal Sinc4 digital filter and
of the analog and digital autocalibration circuits deter-
mines the LTC2410 input bandwidth. When the internal
oscillator is used with the notch set at 60Hz (FO = LOW),
the 3dB input bandwidth is 3.63Hz. When the internal
oscillator is used with the notch set at 50Hz (FO = HIGH),
the 3dB input bandwidth is 3.02Hz. If an external conver-
sion clock generator of frequency fEOSC is connected to the
FO pin, the 3dB input bandwidth is 0.236 10–6 fEOSC.
Due to the complex filtering and calibration algorithms
utilized, the converter input bandwidth is not modeled very
accurately by a first order filter with the pole located at the
3dB frequency. When the internal oscillator is used, the
shape of the LTC2410 input bandwidth is shown in Fig-
ure 35 for FO = LOW and FO = HIGH. When an external
oscillator of frequency fEOSC is used, the shape of the
LTC2410 input bandwidth can be derived from Figure 35,
FO = LOW curve in which the horizontal axis is scaled by
fEOSC/153600.
The conversion noise (800nVRMS typical for VREF = 5V)
can be modeled by a white noise source connected to a
noise free converter. The noise spectral density is
62.75nV
√Hz for an infinite bandwidth source and
86.1nV
√Hz for a single 0.5MHz pole source. From these
numbers, it is clear that particular attention must be given
to the design of external amplification circuits. Such
circuits face the simultaneous requirements of very low
bandwidth (just a few Hz) in order to reduce the output
referred noise and relatively high bandwidth (at least
500kHz) necessary to drive the input switched-capacitor
network. A possible solution is a high gain, low bandwidth
amplifier stage followed by a high bandwidth unity-gain
buffer.
Figure 27. Offset Error vs Output Data Rate and Temperature
Figure 28. +FS Error vs Output Data Rate and Temperature
Figure 29. –FS Error vs Output Data Rate and Temperature
OUTPUT DATA RATE (READINGS/SEC)
0
102030405060708090 100
OFFSET
ERROR
(ppm
OF
V
REF
)
2410 F27
500
450
400
350
300
250
200
150
100
50
0
TA = 85°C
VCC = 5V
REF+ = 5V
REF – = GND
VINCM = 2.5V
VIN = 0V
FO = EXTERNAL OSCILLATOR
TA = 25°C
OUTPUT DATA RATE (READINGS/SEC)
0
102030405060708090 100
+FS
ERROR
(ppm
OF
V
REF
)
2410 F28
7000
6000
5000
4000
3000
2000
1000
0
TA = 85°C
VCC = 5V
REF+ = 5V
REF – = GND
IN+ = 3.75V
IN – = 1.25V
FO = EXTERNAL OSCILLATOR
TA = 25°C
OUTPUT DATA RATE (READINGS/SEC)
0
102030405060708090 100
–FS
ERROR
(ppm
OF
V
REF
)
2410 F29
0
–1000
–2000
–3000
–4000
–5000
–6000
–7000
TA = 85°C
VCC = 5V
REF+ = 5V
REF – = GND
IN+ = 1.25V
IN – = 3.75V
FO = EXTERNAL OSCILLATOR
TA = 25°C
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