參數(shù)資料
型號: LTC2410IGN
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 24-Bit No Latency ADC with Differential Input and Differential Reference
中文描述: 1-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16
封裝: 0.150 INCH, PLASTIC, SSOP-16
文件頁數(shù): 41/44頁
文件大?。?/td> 778K
代理商: LTC2410IGN
LTC2410
41
TYPICAL APPLICATIO S
**********************************
* The next short loop waits for the *
* LTC2410's conversion to finish before *
* starting the SPI data transfer *
**********************************
*
CONVENDLDAA
PORTD
ANDA
#%00000100
*
*
*
BNE
CONVEND
Retrieve the contents of port D
Look at bit 2
Bit 2 = Hi; the LTC2410's conversion is not
complete
Bit 2 = Lo; the LTC2410's conversion is complete
Branch to the loop's beginning while bit 2 remains
high
*
*
********************
* The SPI data transfer *
********************
*
TRFLP1
LDAA
STAA
*
WAIT1
LDAA
#$0
SPDR
Load accumulator A with a null byte for SPI transfer
This writes the byte in the SPI data register and starts
the transfer
This loop waits for the SPI to complete a serial
transfer/exchange by reading the SPI Status Register
The SPIF (SPI transfer complete flag) bit is the SPSR's MSB
and is set to one at the end of an SPI transfer. The branch
will occur while SPIF is a zero.
Load accumulator A with the current byte of LTC2410 data
that was just received
Transfer the LTC2410's data to memory
Increment the pointer
#DIN4+1 Has the last byte been transferred/exchanged
TRFLP1
If the last byte has not been reached, then proceed to the
next byte for transfer/exchange
PORTD,Y %00100000 This sets the SS* output bit to a logic high,
de-selecting the LTC2410
Restore the A register
Restore the Y register
Restore the X register
SPSR
BPL
WAIT1
*
*
LDAA
SPDR
STAA
INX
CPX
BNE
0,X
*
BSET
*
PULA
PULY
PULX
RTS
Figure 55. This is an Example of 68HC11 Code That Captures the LTC2410’s
Conversion Results Over the SPI Serial Interface Shown in Figure 54
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