VREF GND 235112 F02 23 22 10μF LT1790-3 3.5V TO 18V LTC2351-12
參數(shù)資料
型號: LTC2351CUH-12#PBF
廠商: Linear Technology
文件頁數(shù): 7/20頁
文件大小: 0K
描述: IC ADC 12BIT 1.5MSPS 32-QFN
標(biāo)準(zhǔn)包裝: 73
位數(shù): 12
采樣率(每秒): 1.5M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 16.5mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 32-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 管件
輸入數(shù)目和類型: 12 個單端,單極;12 個單端,雙極;6 個差分,單極;6 個差分,雙極
配用: DC1278A-ND - BOARD SAR ADC LTC2351-14
LTC2351-12
15
235112fa
LTC2351-12
VREF
GND
235112 F02
23
22
10μF
LT1790-3
3.5V TO 18V
LTC2351-12
CH0+
CH0
VREF
GND
235112 F01
1
2
11
3
10μF
47pF*
51Ω*
CH1+
CH1
4
5
47pF*
*TIGHT TOLERANCE REQUIRED TO AVOID
APERTURE SKEW DEGRADATION
51Ω*
ANALOG
INPUT
ANALOG
INPUT
APPLICATIONS INFORMATION
INTERNAL REFERENCE
The LTC2351-12 has an on-chip, temperature compen-
sated, bandgap reference that is factory trimmed to 2.5V
to obtain a precise 2.5V input span. The reference amplier
output VREF, (Pin 23) must be bypassed with a capacitor
to ground. The reference amplier is stable with capaci-
tors of 1μF or greater. For the best noise performance, a
10μF ceramic or a 10μF tantalum in parallel with a 0.1μF
ceramic is recommended. The VREF pin can be overdriven
with an external reference as shown in Figure 2. The
voltage of the external reference must be higher than the
2.5V of the open-drain P-channel output of the internal
reference. The recommended range for an external refer-
ence is 2.55V to VDD. An external reference at 2.55V will
see a DC quiescent load of 0.75mA and as much as 3mA
during conversion.
Figure 1. RC Input Filter
Figure 2. Overdriving VREF Pin with an External Reference
net input bandwidth to 30MHz. The 47pF capacitor also
acts as a charge reservoir for the input sample-and-hold
and isolates the ADC input from sampling-glitch sensitive
circuitry. High quality capacitors and resistors should be
used since these components can add distortion. NPO
and silvermica type dielectric capacitors have excellent
linearity. Carbon surface mount resistors can generate
distortion from self heating and from damage that may
occur during soldering. Metal lm surface mount resistors
are much less susceptible to both problems. When high
amplitude unwanted signals are close in frequency to the de-
sired signal frequency a multiple pole lter is required.
High external source resistance, combined with 13pF
of input capacitance, will reduce the rated 50MHz input
bandwidth and increase acquisition time beyond 39ns.
INPUT RANGE
The analog inputs of the LTC2351-12 may be driven fully
differentially with a single supply. Either input may swing
up to VCC, provided the differential swing is no greater
than 2.5V with BIP (Pin 29) Low, or ±1.25V with (BIP Pin
29) High. The 0V to 2.5V range is also ideally suited for
single-ended input use with single supply applications. The
common mode range of the inputs extend from ground
to the supply voltage VCC. If the difference between the
CH+ and CHat any input pair exceeds 2.5V (unipolar) or
1.25V (bipolar), the output code will stay xed at positive
full-scale, and if this difference goes below 0V (unipolar)
or –1.25V (bipolar), the output code will stay xed at
negative full-scale.
INPUT SPAN VERSUS REFERENCE VOLTAGE
The differential input range has a unipolar voltage span
that equals the difference between the voltage at the
reference buffer output VREF (Pin 23) and the voltage at
ground. The differential input range of the ADC is 0V to
2.5V when using the internal reference. The internal ADC
is referenced to these two nodes. This relationship also
holds true with an external reference.
DIFFERENTIAL INPUTS
The ADC will always convert the difference of CH+ minus
CH, independent of the common mode voltage at any pair
of inputs. The common mode rejection holds up at high
frequencies (see Figure 3.) The only requirement is that
both inputs not go below ground or exceed VDD.
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