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參數(shù)資料
| 型號： | LTC2309IUF#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 6/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT SAR 24-QFN |
| 標(biāo)準(zhǔn)包裝： | 91 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 14k |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 15mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-QFN 裸露焊盤（4x4） |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個單端，單極；8 個單端，雙極；4 個差分，單極；4 個差分，雙極 |
| 產(chǎn)品目錄頁面： | 1349 (CN2011-ZH PDF) |
| 配用： | DC1337A-ND - BOARD SAR ADC LTC2309 |
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LTC2309
2309fd
Internal Conversion Clock
The internal conversion clock is factory trimmed to
achieveatypicalconversiontime(tCONV)of1.3μsand
a maximum conversion time of 1.8μs over the full
operatingtemperaturerange.
I2C Interface
TheLTC2309communicatesthroughanI2Cinterface.
TheI2Cinterfaceisa2-wireopen-draininterfacesup-
porting multiple devices and multiple masters on a
singlebus.Theconnecteddevicescanonlypullthe
serialdataline(SDA)LOWandcanneverdriveitHIGH.
SDAisrequiredtobeexternallyconnectedtothesup-
plythroughapull-upresistor.Whenthedatalineisnot
beingdrivenLOW,itisHIGH.DataontheI2Cbuscan
betransferredatratesupto100kbits/sinthestandard
modeandupto400kbits/sinthefastmode.TheVDD
powershouldnotberemovedfromtheLTC2309when
theI2CbusisactivetoavoidloadingtheI2Cbuslines
throughtheinternalESDprotectiondiodes.
EachdeviceontheI2Cbusisrecognizedbyaunique
addressstoredinthedeviceandcanonlyoperateeither
asatransmitterorreceiver,dependingonthefunction
ofthedevice.Adevicecanalsobeconsideredasa
masteroraslavewhenperformingdatatransfers.A
masteristhedevicewhichinitiatesadatatransferon
thebusandgeneratestheclocksignalstopermitthe
transfer.Devicesaddressedbythemasterareconsid-
eredslaves.
TheLTC2309canonlybeaddressedasaslave(see
Table2).Onceaddressed,itcanreceiveconfiguration
bits(DINword)ortransmitthelastconversionresult.The
serialclockline(SCL)isalwaysaninputtotheLTC2309
andtheserialdataline(SDA)isbidirectional.Thedevice
supportsthestandardmodeandthefastmodefordata
transferspeedsupto400kbits/s(seetheTimingDiagram
sectionfordefinitionoftheI2Ctiming).
The START and STOP Conditions
ReferringtoFigure7,aSTART(S)conditionisgener-
atedbytransitioningSDAfromHIGHtoLOWwhile
SCLisHIGH.Thebusisconsideredtobebusyafterthe
STARTcondition.Whenthedatatransferisfinished,a
STOP(P)conditionisgeneratedbytransitioningSDA
fromLOWtoHIGHwhileSCLisHIGH.Thebusisfree
afteraSTOPconditionisgenerated.STARTandSTOP
conditionsarealwaysgeneratedbythemaster.
When the bus is in use, it stays busy if a repeated
START(Sr)isgeneratedinsteadofaSTOPcondition.
TherepeatedSTARTtimingisfunctionallyidenticalto
theSTARTandisusedforwritingandreadingfromthe
devicebeforetheinitiationofanewconversion.
AppLICAtIOns InFORMAtIOn
S
START Condition
STOP Condition
P
2309 F07
SDA
SCL
SDA
SCL
Figure 7. Timing Diagrams of START and STOP Conditions
Data Transferring
AftertheSTARTcondition,theI2Cbusisbusyand
datatransfercanbeginbetweenthemasterandthe
addressedslave.Dataistransferredoverthebusin
groups of nine bits, one byte followed by one ac-
knowledge(ACK)bit.ThemasterreleasestheSDA
lineduringtheninthSCLclockcycle.Theslavedevice
canissueanACKbypullingSDALOWorissueaNot
Acknowledge (NACK) by leaving the SDA line high
impedance(theexternalpull-upresistorwillholdthe
linehigh).ChangeofdataonlyoccurswhiletheSCL
lineisLOW.
Data Format
After a START condition, the master sends a 7-bit
addressfollowedbyaread/write(R/W)bit.TheR/W
bitis1forareadrequestand0forawriterequest.
If the 7-bit address matches one of the LTC2309’s
9pin-selectableaddresses,theADCisselected.When
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