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參數(shù)資料
| 型號： | LTC2284CUP |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | Dual 14-Bit, 105Msps Low Power 3V ADC |
| 中文描述： | DUAL 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| 封裝： | 9 X 9 MM, PLASTIC, MO-220WNJR-5, QFN-64 |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 687K |
| 代理商： | LTC2284CUP |
LTC2284
9
2284fa
SHIFT REGISTER
AND CORRECTION
DIFF
REF
AMP
REF
BUF
2.2
μ
F
1
μ
F
1
μ
F
0.1
μ
F
INTERNAL CLOCK SIGNALS
REFH
REFL
CLOCK/DUTY
CYCLE
RANGE
SELECT
1.5V
REFERENCE
FIRST PIPELINED
ADC STAGE
FIFTH PIPELINED
ADC STAGE
SIXTH PIPELINED
ADC STAGE
FOURTH PIPELINED
ADC STAGE
SECOND PIPELINED
ADC STAGE
REFH
REFL
CLK
OE
MODE
OGND
OV
DD
2284 F01
INPUT
S/H
SENSE
V
CM
A
IN–
A
IN+
2.2
μ
F
THIRD PIPELINED
ADC STAGE
OUTPUT
DRIVERS
CONTROL
LOGIC
SHDN
OF
D13
D0
SHDNA (Pin 59):
Channel A Shutdown Mode Selection
Pin. Connecting SHDNA to GND and OEA to GND results
in normal operation with the outputs enabled. Connecting
SHDNA to GND and OEA to V
DD
results in normal opera-
tion with the outputs at high impedance. Connecting
SHDNA to V
DD
and OEA to GND results in nap mode with
the outputs at high impedance. Connecting SHDNA to V
DD
and OEA to V
DD
results in sleep mode with the outputs at
high impedance.
MODE (Pin 60):
Output Format and Clock Duty Cycle
Stabilizer Selection Pin. Note that MODE controls both
channels. Connecting MODE to GND selects offset binary
output format and turns the clock duty cycle stabilizer off.
1/3 V
DD
selects offset binary output format and turns the
clock duty cycle stabilizer on. 2/3 V
DD
selects 2’s comple-
ment output format and turns the clock duty cycle
PIU
stabilizer on. V
DD
selects 2’s complement output format
and turns the clock duty cycle stabilizer off.
V
CMA
(Pin 61):
Channel A 1.5V Output and Input Common
Mode Bias. Bypass to ground with 2.2
μ
F ceramic chip
capacitor. Do not connect to V
CMB
.
SENSEA (Pin 62):
Channel A Reference Programming Pin.
Connecting SENSEA to V
CMA
selects the internal reference
and a
±
0.5V input range. V
DD
selects the internal reference
and a
±
1V input range. An external reference greater than
0.5V and less than 1V applied to SENSEA selects an input
range of
±
V
SENSEA
.
±
1V is the largest valid input range.
GND (Exposed Pad) (Pin 65):
ADC Power Ground. The
Exposed Pad on the bottom of the package needs to be
soldered to ground.
FU
CTIO
AL BLOCK DIAGRW
U
U
Figure 1. Functional Block Diagram (Only One Channel is Shown)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2284CUP#PBF | 功能描述:IC ADC DUAL 14BIT 105MSPS 64-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應商設備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個單端，單極 |
| LTC2284CUP#TRPBF | 功能描述:IC ADC DUAL 14BIT 105MSPS 64-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| LTC2284IUP | 制造商:Linear Technology 功能描述:ADC Dual Pipelined 105Msps 14-bit Parallel 64-Pin QFN EP |
| LTC2284IUP#PBF | 功能描述:IC ADC DUAL 14BIT 105MSPS 64-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| LTC2284IUP#PBF | 制造商:Linear Technology 功能描述:A/D Converter (A-D) IC 制造商:Linear Technology 功能描述:IC, ADC, 14BIT, 105MSPS, QFN-64 |
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