參數(shù)資料
型號(hào): M25PE10-VMN6P
廠商: 意法半導(dǎo)體
元件分類: DRAM
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 4兆位統(tǒng)一部門,串行閃存
文件頁數(shù): 37/60頁
文件大?。?/td> 310K
代理商: M25PE10-VMN6P
M25PE20, M25PE10
Instructions
37/60
6.11
Write to Lock Register (WRLR)
Note:
The Write to Lock Register (WRLR) instruction is decoded only in the T9HX process (see
Important note on page 6
).
The Write to Lock Register (WRLR) instruction allows bits to be changed in the Lock
Registers. Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed. After the Write Enable (WREN) instruction has been decoded, the
device sets the Write Enable Latch (WEL).
The Write to Lock Register (WRLR) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code, three address bytes (pointing to any address in the targeted
sector and one data byte on Serial Data Input (D). The instruction sequence is shown in
Figure 18
. Chip Select (S) must be driven High after the eighth bit of the data byte has been
latched in, otherwise the Write to Lock Register (WRLR) instruction is not executed.
Lock Register bits are volatile, and therefore do not require time to be written. When the
Write to Lock Register (WRLR) instruction has been successfully executed, the Write
Enable Latch (WEL) bit is reset after a delay time less than t
SHSL
minimum value.
Any Write to Lock Register (WRLR) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Figure 18.
Write to Lock Register (WRLR) instruction sequence
Table 12.
Lock Register In
Sector
Bit
Value
All sectors
b7-b2
‘0’
b1
Sector Lock Down Bit Value
b0
Sector Write Lock Bit Value
AI10784b
C
D
S
23
2
1
3
4
5
6
7
8
9 10
28 29 30 31 32 33 34 35
22 21
3
2
1
0
36 37 38
Instruction
24-Bit Address
0
7
6
5
4
3
2
0
1
Lock Register
Value
39
MSB
MSB
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