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參數資料
| 型號： | LTC2282CUP |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | Dual 12-Bit, 105Msps Low Power 3V ADC; Package: QFN; No of Pins: 64; Temperature Range: 0°C to +70°C |
| 中文描述： | DUAL 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| 封裝： | 9 X 9 MM, PLASTIC, MO-220WNJR-5, QFN-64 |
| 文件頁數： | 23/24頁 |
| 文件大?。?/td> | 463K |
| 代理商： | LTC2282CUP |
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PIN FUNCTIONS
AINA+ (Pin 1): Channel A Positive Differential Analog
Input.
AINA– (Pin 2): Channel A Negative Differential Analog
Input.
REFHA (Pins 3, 4): Channel A High Reference. Short
together and bypass to Pins 5, 6 with a 0.1μF ceramic chip
capacitor as close to the pin as possible. Also bypass to
Pins 5, 6 with an additional 2.2μF ceramic chip capacitor
and to ground with a 1μF ceramic chip capacitor.
REFLA (Pins 5, 6): Channel A Low Reference. Short
together and bypass to Pins 3, 4 with a 0.1μF ceramic chip
capacitor as close to the pin as possible. Also bypass to
Pins 3, 4 with an additional 2.2μF ceramic chip capacitor
and to ground with a 1μF ceramic chip capacitor.
VDD (Pins 7, 10, 18, 63): Analog 3V Supply. Bypass to
GND with 0.1μF ceramic chip capacitors.
CLKA (Pin 8): Channel A Clock Input. The input sample
starts on the positive edge.
CLKB (Pin 9): Channel B Clock Input. The input sample
starts on the positive edge.
REFLB (Pins 11, 12): Channel B Low Reference. Short
together and bypass to Pins 13, 14 with a 0.1μF ceramic
chip capacitor as close to the pin as possible. Also bypass
to Pins 13, 14 with an additional 2.2μF ceramic chip capaci-
tor and to ground with a 1μF ceramic chip capacitor.
REFHB (Pins 13, 14): Channel B High Reference. Short
together and bypass to Pins 11, 12 with a 0.1μF ceramic
chip capacitor as close to the pin as possible. Also bypass
to Pins 11, 12 with an additional 2.2μF ceramic chip capaci-
tor and to ground with a 1μF ceramic chip capacitor.
AINB– (Pin 15): Channel B Negative Differential Analog
Input.
AINB+ (Pin 16): Channel B Positive Differential Analog
Input.
GND (Pins 17, 64): ADC Power Ground.
SENSEB (Pin 19): Channel B Reference Programming Pin.
Connecting SENSEB to VCMB selects the internal reference
and a ±0.5V input range. VDD selects the internal reference
and a ±1V input range. An external reference greater than
0.5V and less than 1V applied to SENSEB selects an input
range of ±VSENSEB. ±1V is the largest valid input range.
VCMB (Pin 20): Channel B 1.5V Output and Input Common
Mode Bias. Bypass to ground with 2.2μF ceramic chip
capacitor. Do not connect to VCMA.
MUX (Pin 21): Digital Output Multiplexer Control. If MUX is
high, channel A comes out on DA0-DA11, OFA; channel B
comes out on DB0-DB11, OFB. If MUX is low, the output
busses are swapped and channel A comes out on DB0-
DB11, OFB; channel B comes out on DA0-DA11, OFA. To
multiplex both channels onto a single output bus, connect
MUX, CLKA and CLKB together. (This is not recommended
at clock frequencies above 80Msps.)
SHDNB (Pin 22): Channel B Shutdown Mode Selection
Pin. Connecting SHDNB to GND and OEB to GND results
in normal operation with the outputs enabled. Connecting
SHDNB to GND and OEB to VDD results in normal operation
with the outputs at high impedance. Connecting SHDNB
to VDD and OEB to GND results in nap mode with the
outputs at high impedance. Connecting SHDNB to VDD
and OEB to VDD results in sleep mode with the outputs
at high impedance.
OEB (Pin 23): Channel B Output Enable Pin. Refer to
SHDNB pin function.
NC (Pins 24, 25, 41, 42): Do Not Connect These Pins.
DB0 – DB11 (Pins 26 to 30, 33 to 39): Channel B Digital
Outputs. DB11 is the MSB.
OGND (Pins 31, 50): Output Driver Ground.
OVDD (Pins 32, 49): Positive Supply for the Output Drivers.
Bypass to ground with a 0.1μF ceramic chip capacitor.
OFB (Pin 40): Channel B Overow/Underow Output. High
when an overow or underow has occurred.
DA0 – DA11 (Pins 43 to 48, 51 to 56): Channel A Digital
Outputs. DA11 is the MSB.
OFA (Pin 57): Channel A Overow/Underow Output. High
when an overow or underow has occurred.
OEA (Pin 58): Channel A Output Enable Pin. Refer to
SHDNA pin function.
相關PDF資料 |
PDF描述 |
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| LTC2282CUP#TR | Dual 12-Bit, 105Msps Low Power 3V ADC; Package: QFN; No of Pins: 64; Temperature Range: 0°C to +70°C |
| LTC2282IUP | Dual 12-Bit, 105Msps Low Power 3V ADC; Package: QFN; No of Pins: 64; Temperature Range: -40°C to +85°C |
| LTC2282IUP#TR | Dual 12-Bit, 105Msps Low Power 3V ADC; Package: QFN; No of Pins: 64; Temperature Range: -40°C to +85°C |
| LTC2283CUP | Dual 12-Bit, 125Msps Low Power 3V ADC; Package: QFN; No of Pins: 64; Temperature Range: 0°C to +70°C |
| LTC2283CUP#TR | Dual 12-Bit, 125Msps Low Power 3V ADC; Package: QFN; No of Pins: 64; Temperature Range: 0°C to +70°C |
相關代理商/技術參數 |
參數描述 |
|---|---|
| LTC2282CUP#PBF | 功能描述:IC ADC DUAL 12BIT 105MSPS 64-QFN RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:- 位數:14 采樣率（每秒）:83k 數據接口:串行，并聯 轉換器數目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數目和類型:1 個單端，雙極 |
| LTC2282CUP#TRPBF | 功能描述:IC ADC DUAL 12BIT 105MSPS 64-QFN RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:- 位數:14 采樣率（每秒）:83k 數據接口:串行，并聯 轉換器數目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數目和類型:1 個單端，雙極 |
| LTC2282CUP-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual 12-Bit, 105Msps Low Power 3V ADC |
| LTC2282CUP-TR | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual 12-Bit, 105Msps Low Power 3V ADC |
| LTC2282CUP-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual 12-Bit, 105Msps Low Power 3V ADC |
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