參數(shù)資料
型號: LTC2264IUJ-14#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: PROPRIETARY METHOD ADC, QCC40
封裝: 6 X 6 MM, LEAD FREE, PLASTIC, QFN-40
文件頁數(shù): 1/32頁
文件大?。?/td> 1451K
代理商: LTC2264IUJ-14#PBF
LTC2265-14/
LTC2264-14/LTC2263-14
1
22654314fb
TYPICAL APPLICATION
DESCRIPTION
14-Bit, 65Msps/40Msps/
25Msps Low Power Dual ADCs
TheLTC2265-14/LTC2264-14/LTC2263-14are2-channel,
simultaneous sampling 14-bit A/D converters designed
for digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 73.7dB SNR and
90dB spurious free dynamic range (SFDR). Ultralow jitter
of 0.15psRMSallowsundersamplingofIFfrequencieswith
excellent noise performance.
DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ)
and no missing codes over temperature. The transition
noise is a low 1.2LSBRMS.
The digital outputs are serial LVDS to minimize the num-
ber of data lines. Each channel outputs two bits at a time
(2-lane mode) or one bit at a time (1-lane mode). The LVDS
drivers have optional internal termination and adjustable
output levels to ensure clean signal integrity.
The ENC+ and ENCinputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL, or
CMOS inputs. An internal clock duty cycle stabilizer
allows high performance at full speed for a wide range of
clock duty cycles.
LTC2265-14, 65Msps,
2-Tone FFT, fIN = 70MHz and 75MHz
FEATURES
APPLICATIONS
n
2-Channel Simultaneous Sampling ADC
n
73.7dB SNR
n
90dB SFDR
n
Low Power: 171mW/113mW/94mW Total
n
85mW/56mW/47mW per Channel
n
Single 1.8V Supply
n
Serial LVDS Outputs: 1 or 2 Bits per Channel
n
Selectable Input Ranges: 1VP-P to 2VP-P
n
800MHz Full Power Bandwidth S/H
n
Shutdown and Nap Modes
n
Serial SPI Port for Configuration
n
Pin Compatible 14-Bit and 12-Bit Versions
n
40-Pin (6mm
× 6mm) QFN Package
n
Communications
n
Cellular Base Stations
n
Software Defined Radios
n
Portable Medical Imaging
n
Multichannel Data Acquisition
n
Nondestructive Testing
CH.1
ANALOG
INPUT
CH.2
ANALOG
INPUT
ENCODE
INPUT
226514 TA01
GND
OGND
+
S/H
+
S/H
14-BIT
ADC CORE
14-BIT
ADC CORE
PLL
DATA
SERIALIZER
SERIALIZED
LVDS
OUTPUTS
1.8V
VDD
OVDD
OUT1A
OUT1B
OUT2A
OUT2B
DATA
CLOCK
OUT
FRAME
FREQUENCY (MHz)
0
–100
–110
–120
–70
–60
–80
–90
AMPLITUDE
(dBFS) –50
–30
–40
–20
–10
0
10
20
30
226514 TA02
L
, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
相關(guān)PDF資料
PDF描述
LTC2264IUJ-14#TRPBF PROPRIETARY METHOD ADC, QCC40
LTC2265IUJ-14#TRPBF PROPRIETARY METHOD ADC, QCC40
LTC2263IUJ-14#PBF PROPRIETARY METHOD ADC, QCC40
LTC2264CUJ-14#PBF PROPRIETARY METHOD ADC, QCC40
LTC2265CUJ-14#TRPBF PROPRIETARY METHOD ADC, QCC40
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LTC2264IUJ-14TRPBF 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs
LTC2265-12 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs
LTC2265-14 制造商:LINER 制造商全稱:Linear Technology 功能描述:Quad 14-Bit, 125Msps ADC with Integrated Drivers
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