POWER REQUIREMENTS The l denotes the specifications whic" />
參數(shù)資料
型號(hào): LTC2264CUJ-12#TRPBF
廠商: Linear Technology
文件頁(yè)數(shù): 31/34頁(yè)
文件大?。?/td> 0K
描述: IC ADC 12BIT SER/PAR 40M 40-QFN
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 12
采樣率(每秒): 40M
數(shù)據(jù)接口: Serial LVDS
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 169mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-QFN(6x6)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 Differential; 2 Single-Ended
配用: DC1371A-ND - BOARD USB DATA ACQUISITION HS
6
22654312fb
LTC2265-12/
LTC2264-12/LTC2263-12
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 9)
SYMBOL PARAMETER
CONDITIONS
LTC2265-12
LTC2264-12
LTC2263-12
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
VDD
Analog Supply Voltage (Note 10)
l
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
OVDD
Output Supply Voltage (Note 10)
l
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
IVDD
Analog Supply Current Sine Wave Input
l
82
98
52
63
42
50
mA
IOVDD
Digital Supply Current 1-Lane Mode, 1.75mA Mode
1-Lane Mode, 3.5mA Mode
2-Lane Mode, 1.75mA Mode
2-Lane Mode, 3.5mA Mode
l
11
20
15
28
18
31
10
19
15
28
18
31
10
18
14
27
17
31
mA
PDISS
Power Dissipation
1-Lane Mode, 1.75mA Mode
1-Lane Mode, 3.5mA Mode
2-Lane Mode, 1.75mA Mode
2-Lane Mode, 3.5mA Mode
l
167
184
175
198
209
232
112
128
121
144
146
169
94
108
101
124
121
146
mW
PSLEEP
Sleep Mode Power
1
mW
PNAP
Nap Mode Power
60
mW
PDIFFCLK Power Increase with Differential Encode Mode Enabled
(No Increase for Sleep Mode)
20
mW
TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
LTC2265-12
LTC2264-12
LTC2263-12
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
fS
Sampling Frequency
(Notes 10, 11)
l
5
65
5
40
5
25
MHz
tENCL
ENC Low Time (Note 8) Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l
7.3
2
7.69
100
11.88
2
12.5
100
19
2
20
100
ns
tENCH
ENC High Time (Note 8) Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l
7.3
2
7.69
100
11.88
2
12.5
100
19
2
20
100
ns
tAP
Sample-and-Hold
Acquisition Delay Time
0
ns
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