參數(shù)資料
型號: LTC2261CUJ-14#TRPBF
廠商: Linear Technology
文件頁數(shù): 1/34頁
文件大小: 0K
描述: IC ADC 14BIT 125MSPS 40-QFN
產(chǎn)品培訓模塊: LTC2262 - Ultra Low Power High Speed ADCs
標準包裝: 2,000
位數(shù): 14
采樣率(每秒): 125M
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 1
功率耗散(最大): 150mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應商設備封裝: 40-QFN(6x6)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個差分
配用: DC890B-ND - BOARD USB DATA COLLECTION
1
226114fc
LTC2261-14
LTC2260-14/LTC2259-14
For more information www.linear.com/LTC2261-14
Typical applicaTion
FeaTures
applicaTions
DescripTion
14-Bit, 125/105/80Msps
Ultralow Power 1.8V ADCs
n
Communications
n
Cellular Base Stations
n
Software Defined Radios
n
Portable Medical Imaging
n
Multi-Channel Data Acquisition
n
Nondestructive Testing
n
73.4dB SNR
n
85dB SFDR
n
Low Power: 127mW/106mW/89mW
n
Single 1.8V Supply
n
CMOS, DDR CMOS or DDR LVDS Outputs
n
Selectable Input Ranges: 1VP-P to 2VP-P
n
800MHz Full-Power Bandwidth S/H
n
Optional Data Output Randomizer
n
Optional Clock Duty Cycle Stabilizer
n
Shutdown and Nap Modes
n
Serial SPI Port for Configuration
n
Pin Compatible 14-Bit and 12-Bit Versions
n
40-Pin (6mm
× 6mm) QFN Package
pling 14-bit A/D converters designed for digitizing high
frequency, wide dynamic range signals. They are perfect
for demanding communications applications with AC
performancethatincludes73.4dBSNRand85dBspurious
free dynamic range (SFDR). Ultralow jitter of 0.17psRMS
allows undersampling of IF frequencies with excellent
noise performance.
DC specs include ±1LSB INL (typical), ±0.3LSB DNL (typi-
cal)andnomissingcodesovertemperature.Thetransition
noise is a low 1.2LSBRMS.
The digital outputs can be either full-rate CMOS, double-
data rate CMOS, or double-data rate LVDS. A separate
output power supply allows the CMOS output swing to
range from 1.2V to 1.8V.
The ENC+ and ENCinputs may be driven differentially or
single ended with a sine wave, PECL, LVDS, TTL or CMOS
inputs. An optional clock duty cycle stabilizer allows high
performance at full speed for a wide range of clock duty
cycles.
2-Tone FFT, fIN = 70MHz and 75MHz
+
INPUT
S/H
CORRECTION
LOGIC
OUTPUT
DRIVERS
14-BIT
PIPELINED
ADC CORE
CLOCK/DUTY
CYCLE
CONTROL
D13
D0
125MHz
CLOCK
ANALOG
INPUT
226114 TA01a
CMOS
OR
LVDS
1.2V
TO 1.8V
1.8V
VDD
OVDD
OGND
GND
FREQUENCY (MHz)
0
–100
–110
–120
–70
–60
–80
–90
AMPLITUDE
(dBFS) –50
–30
–40
–20
–10
0
10
20
30
40
50
60
226114 TA01b
L
, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
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