參數(shù)資料
型號(hào)： LTC2258IUJ-12#PBF
廠商： LINEAR TECHNOLOGY CORP
元件分類： ADC
英文描述： 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC40
封裝： 6 X 6 MM, LEAD FREE, PLASTIC, QFN-40
文件頁數(shù)： 8/32頁
文件大?。?/td> 1156K
代理商： LTC2258IUJ-12#PBF
LTC2258-12
LTC2257-12/LTC2256-12
16
225812fa
FUNCTIONAL BLOCK DIAGRAM
Figure 1. Functional Block Diagram
PIN FUNCTIONS
DOUBLE DATA RATE LVDS OUTPUT MODE
All Pins Below Have LVDS Output Levels. The Output
Current Level is Programmable. There is an Optional
Internal 100Ω Termination Resistor Between the Pins
of Each LVDS Output Pair.
D0_1–/D0_1+ to D10_11–/D10_11+ (Pins 19/20, 21/22,
23/24, 29/30, 31/32, 33/34): Double Data Rate Digital
Outputs. Two data bits are multiplexed onto each differential
output pair. The even data bits (D0, D2, D4, D6, D8, D10)
appear when CLKOUT+ is low. The odd data bits (D1, D3,
D5, D7, D9, D11) appear when CLKOUT+ is high.
CLKOUT–/CLKOUT+ (Pins 27/28):
Data Output Clock.
The digital outputs normally transition at the same time
as the falling and rising edges of CLKOUT+. The phase of
CLKOUT+ can also be delayed relative to the digital outputs
by programming the mode control registers.
OF–/OF+ (Pins 35/36):
Over/Under Flow Digital Output. OF+
is high when an overow or underow has occurred.
DIFF
REF
AMP
REF
BUF
2.2μF
0.1μF
INTERNAL CLOCK SIGNALS
REFH
REFL
CLOCK/DUTY
CYCLE
CONTROL
RANGE
SELECT
1.25V
REFERENCE
FIRST PIPELINED
ADC STAGE
FIFTH PIPELINED
ADC STAGE
FOURTH PIPELINED
ADC STAGE
SECOND PIPELINED
ADC STAGE
ENC+
ENC–
SHIFT REGISTER
AND CORRECTION
SDO
CS
OGND
OF
OVDD
D11
CLKOUT–
CLKOUT+
D0
225812 F01
INPUT
S/H
SENSE
VREF
AIN
–
AIN
+
1μF
VCM
0.1μF
VDD/2
THIRD PIPELINED
ADC STAGE
OUTPUT
DRIVERS
MODE
CONTROL
REGISTERS
SCK
PAR/SER
SDI
VDD
GND
相關(guān)PDF資料
PDF描述
LTC2257IUJ-12#TRPBF 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC40
LTC2257CUJ-14#TRPBF 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC40
LTC2257IUJ-14#TRPBF 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC40
LTC2256CUJ-14#PBF 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC40
LTC2256CUJ-14#TRPBF 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC40
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LTC2258IUJ-12-TRPBF 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 65/40/2 5Msps Ultralow Power 1.8V ADCs
LTC2258IUJ-14#PBF 功能描述:IC ADC 14BIT 65MSPS 1.8V 40-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6
LTC2258IUJ-14#TRPBF 功能描述:IC ADC 14BIT 65MSPS 1.8V 40-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端，雙極
LTC2258IUJ-14-PBF 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 65/40/25Msps Ultralow Power 1.8V ADCs
LTC2258IUJ-14-TRPBF 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 65/40/25Msps Ultralow Power 1.8V ADCs
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