參數(shù)資料
型號: LTC2245
廠商: Linear Technology Corporation
英文描述: 14-Bit, 80Msps Low Power 3V ADC
中文描述: 14位,80Msps ADC的低功耗3V的
文件頁數(shù): 7/20頁
文件大?。?/td> 464K
代理商: LTC2245
LTC2249
7
2249f
TYPICAL PERFOR U
SNR vs Input Level,
f
IN
= 70MHz, 2V Range
I
OVDD
vs Sample Rate, 5MHz Sine
Wave Input, –1dB, O
VDD
= 1.8V
I
VDD
vs Sample Rate,
5MHz Sine Wave Input, –1dB
SFDR vs Input Level,
f
IN
= 70MHz, 2V Range
PIU
A
IN
+ (Pin 1):
Positive Differential Analog Input.
A
IN
- (Pin 2):
Negative Differential Analog Input.
REFH (Pins 3, 4):
ADC High Reference. Short together and
bypass to pins 5, 6 with a 0.1
μ
F ceramic chip capacitor as
close to the pin as possible. Also bypass to pins 5, 6 with
an additional 2.2
μ
F ceramic chip capacitor and to ground
with a 1
μ
F ceramic chip capacitor.
REFL (Pins 5, 6):
ADC Low Reference. Short together and
bypass to pins 3, 4 with a 0.1
μ
F ceramic chip capacitor as
close to the pin as possible. Also bypass to pins 3, 4 with
an additional 2.2
μ
F ceramic chip capacitor and to ground
with a 1
μ
F ceramic chip capacitor.
V
DD
(Pins 7, 32):
3V Supply. Bypass to GND with 0.1
μ
F
ceramic chip capacitors.
GND (Pin 8):
ADC Power Ground.
CLK (Pin 9):
Clock Input. The input sample starts on the
positive edge.
SHDN (Pin 10):
Shutdown Mode Selection Pin. Connect-
ing SHDN to GND and OE to GND results in normal
INPUT LEVEL (dBFS)
–50
–60
–70
S
30
40
50
–20
0
2249 G13
20
10
0
–40
–30
dBFS
dBc
–10
60
70
80
INPUT LEVEL (dBFS)
–80
S
60
50
40
30
dBc
dBFS
90
80
70
100
0
2249 G14
0
–60
–40
–20
20
10
120
110
100dBc SFDR
REFERENCE LINE
SAMPLE RATE (Msps)
0
50
I
V
55
65
70
75
85
10
50
70
2249 G15
60
80
40
90 100
20 30
60
80
2V RANGE
1V RANGE
SAMPLE RATE (Msps)
0
0
I
O
1
3
4
5
7
10
50
70
2249 G16
2
6
40
90 100
20 30
60
80
相關(guān)PDF資料
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