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參數(shù)資料
| 型號： | LTC2217CUP |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| 封裝： | 9 X 9 MM, PLASTIC, MO-220WNJR, QFN-64 |
| 文件頁數(shù)： | 14/32頁 |
| 文件大?。?/td> | 1285K |
| 代理商： | LTC2217CUP |
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LTC2217
21
2217f
The internal programmable gain amplier provides the
internal reference voltage for the ADC. This amplier has
very stringent settling requirements and therefore is not
accessible for external use.
The SENSE pin can be driven ±5% around the nominal 2.5V
or 1.25V external reference inputs. This adjustment range
can be used to trim the ADC gain error or other system
gain errors. When selecting the internal reference, the
SENSE pin should be tied to VDD as close to the converter
as possible. If the sense pin is driven externally it should
be bypassed to ground as close to the device as possible
with 1μF ceramic capacitor.
Figure 7. A 2.75V Range ADC with
an External 2.5V Reference
VCM
SENSE
1.575V
3.3V
2.2
μF
2.2
μF
1
μF
2217 F07
LTC1461-2.5
2
6
4
LTC2217
3. If the ADC is clocked with a xed-frequency sinusoidal
signal, lter the encode signal to reduce wideband
noise.
4. Balance the capacitance and series resistance at both
encode inputs such that any coupled noise will appear
at both inputs as common mode noise.
The encode inputs have a common mode range of 1.2V
to VDD. Each input may be driven from ground to VDD for
single-ended drive.
Driving the Encode Inputs
The noise performance of the LTC2217 can depend on
the encode signal quality as much as on the analog input.
The encode inputs are intended to be driven differentially,
primarily for noise immunity from common mode noise
sources. Each input is biased through a 6k resistor to a
1.6V bias. The bias resistors set the DC operating point
for transformer coupled drive circuits and can set the logic
threshold for single-ended drive circuits.
Any noise present on the encode signal will result in ad-
ditional aperture jitter that will be RMS summed with the
inherent ADC aperture jitter.
In applications where jitter is critical (high input frequen-
cies), take the following into consideration:
1. Differential drive should be used.
2. Use as large an amplitude possible. If using trans-
former coupling, use a higher turns ratio to increase the
amplitude.
Figure 8a. Equivalent Encode Input Circuit
VDD
LTC2217
2217 F08a
VDD
ENC–
ENC+
1.6V
6k
TO INTERNAL
ADC CLOCK
DRIVERS
VDD
Figure 8b. Balun-Driven Encode
50
Ω
100
Ω
8.2pF
0.1
μF
0.1
μF
0.1
μF
T1
T1 = MA/COM ETC1-1-13
RESISTORS AND CAPACITORS
ARE 0402 PACKAGE SIZE
50
Ω
LTC2217
2217 F08b
ENC–
ENC+
APPLICATIONS INFORMATION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LTC2217CUP#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| LTC2226HLU#PBF | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP32 |
| LTC2226HLU | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP32 |
| LTC2226HLU#TRPBF | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP32 |
| LTC2226HLU#TR | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP32 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2217CUP#PBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 105Msps 16-bit Parallel/LVDS 64-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16BIT 105MSPS LN 64-QFN 制造商:Linear Technology 功能描述:16BIT ADC 105MSPS L NOISE 64QFN 制造商:Linear Technology 功能描述:16BIT ADC, 105MSPS, L NOISE, 64QFN |
| LTC2217CUP#TRPBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 105Msps 16-bit Parallel/LVDS 64-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 16BIT 105MSPS LN 64-QFN |
| LTC2217CUP-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 105Msps Low Noise ADC |
| LTC2217CUP-TR | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 105Msps Low Noise ADC |
| LTC2217CUP-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 105Msps Low Noise ADC |
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