參數(shù)資料
型號(hào)： LTC2208CUP-14
廠商： LINEAR TECHNOLOGY CORP
元件分類(lèi)： ADC
英文描述： 14-Bit, 130Msps ADC
中文描述： 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
封裝： 9 X 9 MM, PLASTIC, MO-220WNJR-5, QFN-64
文件頁(yè)數(shù)： 19/28頁(yè)
文件大?。?/td> 1056K
代理商： LTC2208CUP-14
LTC2208-14
19
220814f
input change is large, such as the change seen with input
frequencies near Nyquist, then a larger charging glitch
will be seen.
Common Mode Bias
The ADC sample-and-hold circuit requires differential
drive to achieve specified performance. Each input should
swing ±0.5625V for the 2.25V range (PGA = 0) or ±0.375V
for the 1.5V range (PGA = 1), around a common mode
voltage of 1.25V. The V
CM
output pin (Pin 3) is designed
to provide the common mode bias level. V
CM
can be tied
directly to the center tap of a transformer to set the DC
input level or as a reference level to an op amp differential
driver circuit. The V
CM
pin must be bypassed to ground
close to the ADC with 2.2μF or greater.
Input Drive Impedance
As with all high performance, high speed ADCs the dy-
namic performance of the LTC2208-14 can be influenced
by the input drive circuitry, particularly the second and
third harmonics. Source impedance and input reactance
can influence SFDR. At the falling edge of ENC the
sample and hold circuit will connect the 4.9pF sampling
capacitor to the input pin and start the sampling period.
The sampling period ends when ENC rises, holding the
sampled input on the sampling capacitor. Ideally, the
input circuitry should be fast enough to fully charge
the sampling capacitor during the sampling period
1/(2F encode); however, this is not always possible and the
incomplete settling may degrade the SFDR. The sampling
glitch has been designed to be as linear as possible to
minimize the effects of incomplete settling.
For the best performance it is recommended to have a
source impedance of 100
Ω
or less for each input. The
source impedance should be matched for the differential
inputs. Poor matching will result in higher even order
harmonics, especially the second.
INPUT DRIVE CIRCUITS
Input Filtering
A first order RC low pass filter at the input of the ADC can
serve two functions: limit the noise from input circuitry and
provide isolation from ADC S/H switching. The LTC2208-14
has a very broadband S/H circuit, DC to 700MHz; it can
be used in a wide range of applications; therefore, it is not
possible to provide a single recommended RC filter.
Figures 3, 4a and 4b show three examples of input RC
filtering at three ranges of input frequencies. In general
it is desirable to make the capacitors as large as can be
tolerated—this will help suppress random noise as well
as noise coupled from the digital circuitry. The LTC2208-
14 does not require any input filter to achieve data sheet
specifications; however, no filtering will put more stringent
noise requirements on the input drive circuitry.
Transformer Coupled Circuits
Figure 3 shows the LTC2208-14 being driven by an RF
transformer with a center-tapped secondary. The secondary
center tap is DC biased with V
CM
, setting the ADC input
signal at its optimum DC level. Figure 3 shows a 1:1 turns
ratio transformer. Other turns ratios can be used; however,
as the turns ratio increases so does the impedance seen by
the ADC. Source impedance greater than 50
Ω
can reduce
the input bandwidth and increase high frequency distor-
tion. A disadvantage of using a transformer is the loss of
low frequency response. Most small RF transformers have
poor performance at frequencies below 1MHz.
Center-tapped transformers provide a convenient means
of DC biasing the secondary; however, they often show
poor balance at high input frequencies, resulting in large
2nd order harmonics.
Figure 3. Single-Ended to Differential Conversion
Using a Transformer. Recommended for Input
Frequencies from 5MHz to 100MHz
APPLICATIOU
W
U
U
35
5
35
10
10
5
5
0.1
μ
F
A
IN+
A
IN–
8.2pF
2.2
μ
F
8.2pF
8.2pF
V
CM
T1
T1 = MA/COM ETC1-1T
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
EXCEPT 2.2
μ
F
220814 F03
LTC2208-14
相關(guān)PDF資料
PDF描述
LTC2208IUP-14 14-Bit, 130Msps ADC
LTC2208UP-14 14-Bit, 130Msps ADC
LTC2208 16-Bit, 130Msps ADC
LTC2208CUP 16-Bit, 130Msps ADC
LTC2208IUP 16-Bit, 130Msps ADC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LTC2208CUP-14#PBF 制造商:Linear Technology 功能描述:ADC Single Pipelined 130Msps 14-bit Parallel/LVDS 64-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 14BIT 130MSPS 64-QFN 制造商:Linear Technology 功能描述:IC ADC 14BIT 130MSPS QFN-64 制造商:Linear Technology 功能描述:IC, ADC, 14BIT, 130MSPS, QFN-64; Resolution (Bits):14bit; Sampling Rate:130MSPS; Supply Voltage Type:Single; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Supply Current:401mA; Digital IC Case Style:QFN; No. of Pins:64 ;RoHS Compliant: Yes
LTC2208CUP-14#TR 制造商:Linear Technology 功能描述:IC ADC 14BIT 130MSPS 64-QFN
LTC2208CUP-14#TRPBF 制造商:Linear Technology 功能描述:ADC Single Pipelined 130Msps 14-bit Parallel/LVDS 64-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 14BIT 130MSPS 64-QFN
LTC2208CUPPBF 制造商:Linear Technology 功能描述:ADC 130Msps 16-Bit Parallel/LVDS QFN64EP
LTC2208IUP 制造商:Linear Technology 功能描述:ADC Single Pipelined 130Msps 16-bit Parallel/LVDS 64-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16BIT 130MSPS 64-QFN
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