參數(shù)資料
型號: LTC2195IUKG#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 2-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC52
封裝: 7 X 8 MM, LEAD FREE, PLASTIC, QFN-52
文件頁數(shù): 1/28頁
文件大?。?/td> 893K
代理商: LTC2195IUKG#PBF
1
219543f
LTC2195
LTC2194/LTC2193
APPLICATIONS
n
Communications
n
Cellular Base Stations
n
Software-Defined Radios
n
Portable Medical Imaging
n
Multi-Channel Data Acquisition
n
Nondestructive Testing
TYPICAL APPLICATION
DESCRIPTION
16-Bit, 125/105/80Msps
Low Power Dual ADCs
The LTC2195/LTC2194/LTC2193 are 2-channel, simul-
taneous sampling 16-bit A/D converters designed for
digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 76.8dB SNR and
90dB spurious free dynamic range (SFDR). Ultralow jitter
of 0.07psRMSallowsundersamplingofIFfrequencieswith
excellent noise performance.
DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ)
and no missing codes over temperature. The transition
noise is 3.4LSBRMS.
To minimize the number of data lines the digital outputs
are serial LVDS. Each channel outputs two bits or four bits
at a time. At lower sampling rates there is a one bit per
channel option. The LVDS drivers have optional internal
termination and adjustable output levels to ensure clean
signal integrity.
The ENC+ and ENCinputs may be driven differentially or
single ended with a sine wave, PECL, LVDS, TTL or CMOS
inputs. An internal clock duty cycle stabilizer allows high
performance at full speed for a wide range of clock duty
cycles.
FEATURES
n
2-Channel Simultaneous Sampling ADC
n
Serial LVDS Outputs: 1, 2 or 4 Bits per Channel
n
76.8dB SNR
n
90dB SFDR
n
Low Power: 432mW/360mW/249mW Total
n
216mW/180mW/125mW per Channel
n
Single 1.8V Supply
n
Selectable Input Ranges: 1VP-P to 2VP-P
n
550MHz Full-Power Bandwidth S/H
n
Shutdown and Nap Modes
n
Serial SPI Port for Configuration
n
52-Pin (7mm
× 8mm) QFN Package
2-Tone FFT, fIN = 70MHz and 69MHz
16-BIT
ADC CORE
CH1
ANALOG
INPUT
CH2
ANALOG
INPUT
ENCODE
INPUT
S/H
16-BIT
ADC CORE
OUT1A
OUT1B
OUT1C
OUT1D
OUT2A
OUT2B
OUT2C
OUT2D
DATA CLOCK OUT
FRAME
S/H
DATA
SERIALIZER
PLL
OGND
219543 TA01a
SERIALIZED
LVDS
OUTPUTS
GND
VDD
OVDD
1.8V
L
, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
FREQUENCY (MHz)
0
–100
–110
–120
–70
–60
–80
–90
AMPLITUDE
(dBFS) –50
–30
–40
–20
–10
0
10
20
30
40
50
60
219543 TA01b
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