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參數(shù)資料
| 型號： | LTC2190IUKG#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 2-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL/PARALLEL ACCESS, PQCC52 |
| 封裝： | 7 X 8 MM, LEAD FREE, PLASTIC, QFN-52 |
| 文件頁數(shù)： | 1/28頁 |
| 文件大?。?/td> | 876K |
| 代理商： | LTC2190IUKG#PBF |
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1
219210f
LTC2192
LTC2191/LTC2190
APPLICATIONS
n
Communications
n
Cellular Base Stations
n
Software-Defined Radios
n
Portable Medical Imaging
n
Multi-Channel Data Acquisition
n
Nondestructive Testing
TYPICAL APPLICATION
DESCRIPTION
16-Bit, 65Msps/40Msps/
25Msps Low Power
Dual ADCs
The LTC2192/LTC2191/LTC2190 are 2-channel, simul-
taneous sampling 16-bit A/D converters designed for
digitizinghighfrequency,widedynamicrangesignals.They
are perfect for demanding communications applications
with AC performance that includes 77dB SNR and 90dB
spurious free dynamic range (SFDR). Ultralow jitter of
0.07psRMS allows undersampling of IF frequencies with
excellent noise performance.
DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ)
and no missing codes over temperature. The transition
noise is 3.3LSBRMS.
To minimize the number of data lines the digital outputs
are serial LVDS. Each channel outputs one bit, two bits or
four bits at a time. The LVDS drivers have optional internal
termination and adjustable output levels to ensure clean
signal integrity.
The ENC+ and ENC– inputs may be driven differentially or
single ended with a sine wave, PECL, LVDS, TTL or CMOS
inputs. An internal clock duty cycle stabilizer allows high
performance at full speed for a wide range of clock duty
cycles.
FEATURES
n
2-Channel Simultaneous Sampling ADC
n
Serial LVDS Outputs: 1, 2 or 4 Bits per Channel
n
77dB SNR
n
90dB SFDR
n
Low Power: 198mW/146mW/104mW Total
n
99mW/73mW/52mW per Channel
n
Single 1.8V Supply
n
Selectable Input Ranges: 1VP-P to 2VP-P
n
550MHz Full-Power Bandwidth S/H
n
Shutdown and Nap Modes
n
Serial SPI Port for Configuration
n
52-Pin (7mm
× 8mm) QFN Package
2-Tone FFT, fIN = 70MHz and 69MHz
16-BIT
ADC CORE
CH1
ANALOG
INPUT
CH2
ANALOG
INPUT
ENCODE
INPUT
S/H
16-BIT
ADC CORE
OUT1A
OUT1B
OUT1C
OUT1D
OUT2A
OUT2B
OUT2C
OUT2D
DATA CLOCK OUT
FRAME
S/H
DATA
SERIALIZER
PLL
OGND
219210 TA01a
SERIALIZED
LVDS
OUTPUTS
GND
VDD
OVDD
1.8V
L
, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
FREQUENCY (MHz)
0
–100
–110
–120
–70
–60
–80
–90
AMPLITUDE
(dBFS) –50
–30
–40
–20
–10
0
10
20
30
219210 G07
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LTC2192CUKG#PBF | 2-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL/PARALLEL ACCESS, PQCC52 |
| LTC2190CUKG#PBF | 2-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL/PARALLEL ACCESS, PQCC52 |
| LTC2191CUKG#TRPBF | 2-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL/PARALLEL ACCESS, PQCC52 |
| LTC2191IUKG#PBF | 2-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL/PARALLEL ACCESS, PQCC52 |
| LTC2194IUKG#PBF | 2-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC52 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2191CUKG#PBF | 制造商:Linear Technology 功能描述:ADC Dual 40Msps 16-bit Parallel/Serial (SPI)/LVDS 52-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16BIT PAR/SRL 40MSP 52QFN 制造商:Linear Technology 功能描述:ADC DUAL 16BIT 40MSPS 52QFN 制造商:Linear Technology 功能描述:ADC, DUAL, 16BIT, 40MSPS, 52QFN |
| LTC2191CUKG#TRPBF | 制造商:Linear Technology 功能描述:ADC Dual 40Msps 16-bit Parallel/Serial (SPI)/LVDS 52-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 16BIT PAR/SRL 40MSP 52QFN |
| LTC2191CUKGPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
| LTC2191IUKG#PBF | 制造商:Linear Technology 功能描述:IC ADC 16BIT PAR/SRL 40MSP 52QFN |
| LTC2191IUKG#TRPBF | 制造商:Linear Technology 功能描述:IC ADC 16BIT PAR/SRL 40MSP 52QFN |
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