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參數(shù)資料
| 型號： | LTC2162CUK#TRPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48 |
| 封裝： | 7 X 7 MM, LEAD FREE, PLASTIC, MO-220WKKD-2, QFN-48 |
| 文件頁數(shù)： | 17/36頁 |
| 文件大?。?/td> | 651K |
| 代理商： | LTC2162CUK#TRPBF |
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LTC2162/LTC2161/LTC2160
24
216210f
Phase-Shifting the Output Clock
In full rate CMOS mode the data output bits normally
change at the same time as the falling edge of CLKOUT+,
so the rising edge of CLKOUT+ can be used to latch the
output data. In double data rate CMOS and LVDS modes
the data output bits normally change at the same time as
the falling and rising edges of CLKOUT+. To allow adequate
setup and hold time when latching the data, the CLKOUT+
signal may need to be phase-shifted relative to the data
output bits. Most FPGAs have this feature; this is generally
the best place to adjust the timing.
Figure 14. Phase-Shifting CLKOUT
The LTC2162/LTC2161/LTC2160 can also phase-shift the
CLKOUT+/CLKOUT–signalsbyseriallyprogrammingmode
control register A2. The output clock can be shifted by 0°,
45°, 90°, or 135°. To use the phase-shifting feature the
clock duty cycle stabilizer must be turned on. Another
control register bit can invert the polarity of CLKOUT+ and
CLKOUT–, independently of the phase-shift. The combina-
tion of these two features enables phase-shifts of 45° up
to 315° (Figure 14).
applicaTions inForMaTion
Table 1. Output Codes vs Input Voltage
AIN+ – AIN–
(2V RANGE)
OF
D15 – D0
(OFFSET BINARY)
D15 – D0
(2’S COMPLEMENT)
>1.000000V
+0.999970V
+0.999939V
1
0
1111 1111 1111 1111
1111 1111 1111 1110
0111 1111 1111 1111
0111 1111 1111 1110
+0.000030V
+0.000000V
–0.000030V
–0.000061V
0
1000 0000 0000 0001
1000 0000 0000 0000
0111 1111 1111 1111
0111 1111 1111 1110
0000 0000 0000 0001
0000 0000 0000 0000
1111 1111 1111 1111
1111 1111 1111 1110
–0.999939V
–1.000000V
< –1.000000V
0
1
0000 0000 0000 0001
0000 0000 0000 0000
1000 0000 0000 0001
1000 0000 0000 0000
CLKOUT+
D0-D15, OF
PHASE
SHIFT
0°
45°
90°
135°
180°
225°
270°
315°
CLKINV
0
1
CLKPHASE1
MODE CONTROL BITS
0
1
0
1
CLKPHASE0
0
1
0
1
0
1
0
1
216210 F14
ENC+
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