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參數(shù)資料
| 型號： | LTC2160CUK#TRPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48 |
| 封裝： | 7 X 7 MM, LEAD FREE, PLASTIC, MO-220WKKD-2, QFN-48 |
| 文件頁數(shù)： | 35/36頁 |
| 文件大?。?/td> | 651K |
| 代理商： | LTC2160CUK#TRPBF |
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LTC2162/LTC2161/LTC2160
8
216210f
elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND with GND and OGND
shorted (unless otherwise noted).
Note 3: When these pin voltages are taken below GND or above VDD, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above VDD without latchup.
Note 4: When these pin voltages are taken below GND they will be
clamped by internal diodes. When these pin voltages are taken above VDD
they will not be clamped by internal diodes. This product can handle input
currents of greater than 100mA below GND without latchup.
Note 5: VDD = OVDD = 1.8V, fSAMPLE = 65MHz (LTC2162), 40MHz (LTC2161),
or 25MHz (LTC2160), LVDS outputs, differential ENC+/ENC– = 2VP-P sine
wave, input range = 2VP-P with differential drive, unless otherwise noted.
Note 6: Integral nonlinearity is defined as the deviation of a code from a
best fit straight line to the transfer curve. The deviation is measured from
the center of the quantization band.
Note 7: Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 0000 0000 0000 0000 and 1111 1111
1111 1111 in 2’s complement output mode.
Note 8: Guaranteed by design, not subject to test.
Note 9: VDD = 1.8V, fSAMPLE = 65MHz (LTC2162), 40MHz (LTC2161), or
25MHz (LTC2160), CMOS outputs, ENC+ = single-ended 1.8V square wave,
ENC– = 0V, input range = 2VP-P with differential drive, 5pF load on each
digital output unless otherwise noted.
Note 10: Recommended operating conditions.
TiMing DiagraMs
Full-Rate CMOS Output Mode Timing
All Outputs are Single-Ended and Have CMOS Levels
tH
tD
tC
tL
N – 6
N – 5
N – 4
N – 3
N – 2
tAP
N + 1
N + 2
N + 4
N + 3
N
ANALOG
INPUT
ENC–
ENC+
CLKOUT+
CLKOUT–
D0–D15, OF
216210 TD01
相關(guān)PDF資料 |
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| LTC2160IUK#PBF | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48 |
| LTC2160IUK#TRPBF | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48 |
| LTC2162CUK#TRPBF | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48 |
| LTC2162IUK#PBF | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48 |
| LTC2162IUK#TRPBF | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2160IUK#PBF | 制造商:Linear Technology 功能描述:ADC Single 25Msps 16-bit Parallel/Serial (SPI)/LVDS 48-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16BIT 25 MSPS 48-QFN |
| LTC2160IUK#TRPBF | 制造商:Linear Technology 功能描述:ADC Single 25Msps 16-bit Parallel/Serial (SPI)/LVDS 48-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 16BIT 25 MSPS 48-QFN |
| LTC2161 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Precision, Low Power Rail-to-Rail Input/Output |
| LTC2161-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:High Linearity Differential RF/IF Amplifier/ADC Driver |
| LTC2161CUK#PBF | 制造商:Linear Technology 功能描述:ADC Single 40Msps 16-bit Parallel/Serial (SPI)/LVDS 48-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16BIT 40 MSPS 48-QFN 制造商:Linear Technology 功能描述:ADC 16BIT 40MSPS 48QFN 制造商:Linear Technology 功能描述:ADC, 16BIT, 40MSPS, 48QFN |
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