參數(shù)資料
型號： LTC2157IUP-14#PBF
廠商： LINEAR TECHNOLOGY CORP
元件分類： ADC
英文描述： 2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
封裝： 9 X 9 MM, LEAD FREE, PLASTIC, MO-220WNJR-5, QFN-64
文件頁數(shù)： 6/32頁
文件大?。?/td> 647K
代理商： LTC2157IUP-14#PBF
LTC2157-14/
LTC2156-14/LTC2155-14
14
21576514f
PIN FUNCTIONS
LVDS Outputs
The following pins are differential LVDS outputs. The
output current level is programmable. There is an optional
internal 100Ω termination resistor between the pins of
each LVDS output pair.
OF–/OF+ (Pins 22/23):
Over/Underflow Digital Output.
OF+ is high when an overflow or underflow has occurred.
The overflows for channel A and channel B are multiplexed
together.
DB0_1–/DB0_1+ to DB12_13–/DB12_13+ (Pins 24/25, 26/27,
28/29, 30/31, 34/35, 36/37, 38/39): Channel B Double
Data Rate Digital Outputs. Two data bits are multiplexed
onto each differential output pair. The even data bits (DB0,
DB2, DB4, DB6, DB8, DB10, DB12) appear when CLKOUT+
is low. The odd data bits (DB1, DB3, DB5, DB7, DB9, DB11,
DB13) appear when CLKOUT+ is high.
CLKOUT–/CLKOUT+ (Pins 40/41):
Data Output Clock.
The digital outputs normally transition at the same time
as the falling and rising edges of CLKOUT+. The phase of
CLKOUT+ can also be delayed relative to the digital outputs
by programming the mode control registers.
DA0_1–/DA0_1+ to DA12_13–/DA12_13+ (Pins 42/43, 44/45,
46/47, 50/51, 52/53, 54/55, 56/57): Channel A Double
Data Rate Digital Outputs. Two data bits are multiplexed
onto each differential output pair. The even data bits (DA0,
DA2, DA4, DA6, DA8, DA10, DA12) appear when CLKOUT+
is low. The odd data bits (DA1, DA3, DA5, DA7, DA9, DA11,
DA13) appear when CLKOUT+ is high.
FUNCTIONAL BLOCK DIAGRAM
Figure 1. Functional Block Diagram
S/H
VCM
BUFFER
GND
VCM
0.1μF
CORRECTION
LOGIC
OUTPUT
DRIVERS
14-BIT
PIPELINED
ADC CORE
CLOCK/DUTY
CYCLE CONTROL
1.25V
REFERENCE
RANGE
SELECT
CLOCK
ANALOG
INPUT
21576514 F01
DDR
LVDS
DDR
LVDS
VDD
OVDD
OGND
CS
CHANNEL A
CHANNEL B
S/H
CORRECTION
LOGIC
OUTPUT
DRIVERS
SPI
14-BIT
PIPELINED
ADC CORE
ANALOG
INPUT
OVDD
OGND
VREF
2.2μF
GND
SENSE
SCK
SDI
PAR/SER
DA12_13
DA0_1
DB12_13
DB0_1
相關(guān)PDF資料
PDF描述
LTC2155IUP-14#TRPBF 2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
LTC2156IUP-14#PBF 2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
LTC2155CUP-14#PBF 2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
LTC2156CUP-14#TRPBF 2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
LTC2155CUP-14#TRPBF 2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LTC2158-14 制造商:LINER 制造商全稱:Linear Technology 功能描述:30MHz to 1.4GHz IQ Demodulator
LTC2158CUP-14 制造商:Linear Technology 功能描述:ADC DUAL 14BIT 310M 64QFN 制造商:Linear Technology 功能描述:ADC, DUAL, 14BIT, 310M, 64QFN
LTC2158CUP-14#PBF 功能描述:IC ADC DUAL 14BIT 310M 64-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6
LTC2158CUP-14#TRPBF 功能描述:IC ADC DUAL 14BIT 310M 64-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個單端，單極
LTC2158IUP-14 制造商:Linear Technology 功能描述:ADC DUAL 14BIT 310M 64QFN 制造商:Linear Technology 功能描述:ADC, DUAL, 14BIT, 310M, 64QFN
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*