參數(shù)資料
型號(hào)： LTC2155CUP-14#TRPBF
廠商： LINEAR TECHNOLOGY CORP
元件分類： ADC
英文描述： 2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
封裝： 9 X 9 MM, LEAD FREE, PLASTIC, MO-220WNJR-5, QFN-64
文件頁(yè)數(shù)： 5/32頁(yè)
文件大?。?/td> 647K
代理商： LTC2155CUP-14#TRPBF
13
21576514f
LTC2157-14/
LTC2156-14/LTC2155-14
PIN FUNCTIONS
VDD (Pins 1, 2, 15, 16, 17, 64): 1.8V Analog Power Supply.
Bypass to ground with 0.1μF ceramic capacitors. Pins 1,
2, 64 can share a bypass capacitor. Pins 15, 16, 17 can
share a bypass capacitor.
GND (Pins 3, 6, 9, 11, 14, 18, 21, 58, Exposed Pad
Pin 65): ADC Power Ground. The exposed pad must be
soldered to the PCB ground.
AINA+ (Pin 4): Positive Differential Analog Input for
Channel A.
AINA– (Pin 5): Negative Differential Analog Input for
Channel A.
SENSE (Pin 7): Reference Programming Pin. Connecting
SENSE to VDD selects the internal reference and a ±0.75V
input range. An external reference between 1.2V and 1.3V
applied to SENSE selects an input range of ±0.6 × VSENSE.
VREF (Pin 8): Reference Voltage Output. Bypass to ground
with a 2.2μF ceramic capacitor. Nominally 1.25V.
VCM (Pin 10): Common Mode Bias Output; nominally equal
to 0.435 VDD. VCM should be used to bias the common
mode of the analog inputs. Bypass to ground with a 0.1μF
ceramic capacitor.
AINB– (Pin 12): Negative Differential Analog Input for
Channel B.
AINB+ (Pin 13): Positive Differential Analog Input for
Channel B.
ENC+ (Pin 19):
Encode Input. Conversion starts on the
rising edge.
ENC– (Pin 20):
Encode Complement Input. Conversion
starts on the falling edge.
OGND (Pins 33, 48): Output Driver Ground.
OVDD (Pins 32, 49): 1.8V Output Driver Supply. Bypass
each pin to ground with separate 0.1μF ceramic capacitors.
SDO (Pin 59): Serial Interface Data Output. In serial pro-
gramming mode, (PAR/SER = 0V), SDO is the optional serial
interface data output. Data on SDO is read back from the
mode control registers and can be latched on the falling
edge of SCK. SDO is an open-drain N-channel MOSFET
output that requires an external 2k pull-up resistor from
1.8V to 3.3V. If readback from the mode control registers
is not needed, the pull-up resistor is not necessary and
SDO can be left unconnected.
SDI (Pin 60): Serial Interface Data Input. In serial program-
ming mode, (PAR/SER = 0V), SDI is the serial interface
data input. Data on SDI is clocked into the mode control
registers on the rising edge of SCK. In the parallel pro-
gramming mode (PAR/SER = VDD), SDI selects 3.5mA or
1.75mA LVDS output current (see Table 2). SDI can be
driven with 1.8V to 3.3V logic.
SCK (Pin 61): Serial Interface Clock Input. In serial
programming mode, (PAR/SER = 0V), SCK is the serial
interface clock input. In the parallel programming mode
(PAR/SER = VDD), SCK can be used to place the part in the
low power sleep mode (see Table 2). SCK can be driven
with 1.8V to 3.3V logic.
CS (Pin 62): Serial Interface Chip Select Input. In serial
programming mode, (PAR/SER = 0V), CS is the serial in-
terface chip select input. When CS is low, SCK is enabled
for shifting data on SDI into the mode control registers.
In the parallel programming mode (PAR/SER = VDD), CS
controls the clock duty cycle stabilizer (see Table 2). CS
can be driven with 1.8V to 3.3V logic.
PAR/SER (Pin 63): Programming Mode Selection Pin.
Connect to ground to enable the serial programming mode
where CS, SCK, SDI, SDO become a serial interface that
control the A/D operating modes. Connect to VDD to en-
able the parallel programming mode where CS, SCK, SDI
become parallel logic inputs that control a reduced set of
the A/D operating modes. PAR/SER should be connected
directly to ground or the VDD of the part and not be driven
by a logic signal.
相關(guān)PDF資料
PDF描述
LTC2156IUP-14#TRPBF 2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
LTC2156CUP-14#PBF 2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
LTC2157IUP-14#TRPBF 2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
LTC2155IUP-14#PBF 2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
LTC2160CUK#TRPBF 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48
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