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參數資料
| 型號： | LTC2054HVIS5#TRM |
| 廠商： | Linear Technology |
| 文件頁數： | 2/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP 0-DRIFT SGL LP TSOT23-5 |
| 標準包裝： | 500 |
| 放大器類型： | 斷路器（零漂移） |
| 電路數： | 1 |
| 輸出類型： | 滿擺幅 |
| 轉換速率： | 0.5 V/µs |
| 增益帶寬積： | 500kHz |
| 電流 - 輸入偏壓： | 3pA |
| 電壓 - 輸入偏移： | 0.5µV |
| 電流 - 電源： | 175µA |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 11 V，±1.35 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-5 細型，TSOT-23-5 |
| 供應商設備封裝： | TSOT-23-5 |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | LTC2054HVIS5 LTC2054HVIS5-ND |
LTC2054/LTC2055
10
20545fc
APPLICATIONS INFORMATION
Clock Feedthrough, Input Bias Current
The LTC2054 and LTC2055 use auto-zeroing circuitry
to achieve an almost zero DC offset over temperature,
common mode voltage, and power supply voltage. The
frequency of the clock used for auto-zeroing is typically
1.0kHz. The term “clock feedthrough” is broadly used to
indicate visibility of this clock frequency in the op amp
output spectrum. There are typically two types of clock
feedthrough in auto-zeroed op amps like the LTC2054/
LTC2055.
The rst form of clock feedthrough is caused by the settling
of the internal sampling capacitor and is input referred;
that is, it is multiplied by the closed loop gain of the op
amp. This form of clock feedthrough is independent of the
magnitude of the input source resistance or the magnitude
of the gain setting resistors. The LTC2054/LTC2055 have
an input referred residue clock feedthrough of less then
0.2μVRMS at 1.0kHz.
DC to 1Hz Noise
The second form of clock feedthrough is caused by the small
amount of charge injection occurring during the sampling
and holding of the op amp’s input offset voltage. The current
spikes are multiplied by the impedance seen at the input
terminals of the op amp, and the resulting voltage spikes
appear at the output multiplied by the closed loop gain
of the op amp. To reduce this form of clock feedthrough,
use smaller valued gain setting resistors and minimize the
source resistance at the input. If the resistance seen at the
inputs is less than 10kΩ, this form of clock feedthrough
is less than the amount of residue clock feedthrough from
the rst form described above.
Placing a capacitor across the feedback resistor reduces
either form of clock feedthrough by limiting the bandwidth
of the closed loop gain.
Input bias current is dened as the DC current into the
input pins of the op amp. The same current spikes that
DC to 10Hz Noise
0.4μV
10 SEC
20545 F01
1μV
1 SEC
20545 F02
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| LTC2054HVMPS5#PBF | 制造商:Linear Technology 功能描述:SC-Amps/Industrial, Cut Tape Micropower Zero-Drift Operational Amplifier |
| LTC2054HVMPS5#TRMPBF | 功能描述:IC OPAMP 0-DRIFT SGL LP TSOT23-5 RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:50 系列:- 放大器類型:J-FET 電路數:2 輸出類型:- 轉換速率:13 V/µs 增益帶寬積:3MHz -3db帶寬:- 電流 - 輸入偏壓:65pA 電壓 - 輸入偏移:3000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):7 V ~ 36 V，±3.5 V ~ 18 V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應商設備封裝:8-PDIP 包裝:管件 |
| LTC2054HVMPS5#TRPBF | 功能描述:IC OPAMP 0-DRIFT SGL LP TSOT23-5 RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:50 系列:- 放大器類型:J-FET 電路數:2 輸出類型:- 轉換速率:13 V/µs 增益帶寬積:3MHz -3db帶寬:- 電流 - 輸入偏壓:65pA 電壓 - 輸入偏移:3000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):7 V ~ 36 V，±3.5 V ~ 18 V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應商設備封裝:8-PDIP 包裝:管件 |
| LTC2054IS5 | 制造商:Linear Technology 功能描述:SP Amp Zero Drift Amplifier Single R-R O/P 6V 5-Pin TSOT-23 |
| LTC2054IS5#PBF | 制造商:Linear Technology 功能描述:SP Amp Zero Drift Amplifier Single R-R O/P 6V 5-Pin TSOT-23 制造商:Linear Technology 功能描述:OP AMP 6V 500KHZ 0.5V/US 5 |
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