參數(shù)資料
型號(hào): LTC1966MPMS8#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 模擬專用變換器
英文描述: RMS TO DC CONVERTER, PDSO8
封裝: LEAD FREE, PLASTIC, MSOP-8
文件頁(yè)數(shù): 19/38頁(yè)
文件大?。?/td> 387K
代理商: LTC1966MPMS8#PBF
LTC1966
26
1966fb
applicaTions inForMaTion
Input Impedance
The LTC1966 true RMS-to-DC converter utilizes a 2.5pF
capacitor to sample the input at a nominal 100kHz sample
frequency. This accounts for the 8MΩ input impedance.
See Figure 24 for the equivalent analog input circuit. Note
however, that the 8MΩ input impedance does not directly
affect the input sampling accuracy. For instance, if a 100k
sourceresistanceisusedtodrivetheLTC1966,thesampling
action of the input stage will drag down the voltage seen
at the input pins with small spikes at every sample clock
edge as the sample capacitor is connected to be charged.
The time constant of this combination is small, 2.5pF
100kΩ = 250ns, and during the 2.5s period devoted to
sampling, ten time constants elapse. This allows each
sample to settle to within 46ppm and it is these samples
that are used to compute the RMS value.
This is a much higher accuracy than the LTC1966 conver-
sion limits, and far better than the accuracy computed via
the simplistic resistive divider model:
V
R
V
M
k
V
IN
SOURCE
IN
SOURCE
=
+
=
+
=
8
100
1 25
– . %
Figure 24. LTC1966 Equivalent Analog Input Circuit
This resistive divider calculation does give the correct
model of what voltage is seen at the input terminals by a
parallel load averaged over a several clock cycles, which is
what a large shunt capacitor will do—average the current
spikes over several clock cycles.
Whenhighsourceimpedancesareused,caremustbetaken
to minimize shunt capacitance at the LTC1966 input so as
not to increase the settling time. Shunt capacitance of just
2.5pF will double the input settling time constant and the
error in the above example grows from 46ppm to 0.67%
(6700ppm). A 13pF scope probe will increase the error
to almost 20%. As a consequence, it is important to not
try to filter the input with large input capacitances unless
driven by a low impedance. Keep time constant <<2.5s.
WhentheLTC1966isdrivenbyopampoutputs,whoselow
DC impedance can be compromised by sharp capacitive
load switching, a small series resistor may be added. A
10k resistor will easily settle with the 2.5pF input sampling
capacitor to within 1ppm.
These are important points to consider both during design
anddebug.Duringlabdebug,andevenproductiontesting,
a high value series resistor to any test point is advisable.
Output Impedance
The LTC1966 output impedance during operation is simi-
larly due to a switched capacitor action. In this case, 59pF
of on-chip capacitance operating at 100kHz translates into
170kΩ. The closed loop RMS-to-DC calculation cuts that
in half to the nominal 85kΩ specified.
In order to create a DC result, a large averaging capacitor
is required. Capacitive loading and time constants are not
an issue on the output.
IN1
VDD
VSS
RSW (TYP)
6k
CEQ
2.5pF
(TYP)
CEQ
2.5pF
(TYP)
IIN1
IN2
IIN2
1966 F24
RSW (TYP)
6k
IIN
VV
R
IIN
VV
R
RM
AVG
IN
EQ
AVG
IN
EQ
1
2
8
12
21
() =
=
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