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參數(shù)資料
| 型號： | LTC1878 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | High Efficiency Monolithic Synchronous Step-Down Regulator(高效率,單片同步步降穩(wěn)壓器) |
| 中文描述： | 高效率單片同步降壓型穩(wěn)壓器（高效率，單片同步步降穩(wěn)壓器） |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 228K |
| 代理商： | LTC1878 |
10
LTC1878
opti
mized to provide stable high performance transient
response regardless of the output capacitor selected.
ESR is a direct function of the volume of the capacitor.
Manufacturers such as Taiyo-Yuden, AVX, Kemet, Sprague
and Sanyo should be considered for high performance
capacitors. The POSCAP solid electrolytic chip capacitor
available from Sanyo is an excellent choice for output bulk
capacitors due to its low ESR/size ratio. Once the ESR
requirement for C
OUT
has been met, the RMS current
rating generally far exceeds the I
RIPPLE(P-P)
requirement.
When using tantalum capacitors, it is critical that they are
surge tested for use in switching power supplies. A good
choice is the AVX TPS series of surface mount tantalum,
available in case heights ranging from 2mm to 4mm. Other
capacitor types include KEMET T510 and T495 series and
Sprague 593D and 595D series. Consult the manufacturer
for other specific recommendations.
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
V
V
R
R
OUT
=
+
0 8
.
1
2
1
(2)
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 3.
external and internal oscillators. This type of phase detec-
tor will not lock up on input frequencies close to the har-
monics of the V
CO
center frequency. The PLL hold-in range
f
H
is equal to the capture range,
f
H
=
f
C
=
±
150kHz.
The output of the phase detector is a pair of complemen-
tary current sources charging or discharging the external
filter network on the PLL LPF pin. The relationship
between the voltage on the PLL LPF pin and operating
frequency is shown in Figure 4. A simplified block diagram
is shown in Figure 5.
APPLICATIOU
W
U
U
V
FB
GND
LTC1878
0.8V
≤
V
OUT
≤
6V
R2
R1
1878 F03
Figure 3. Setting the LTC1878 Output Voltage
Phase-Locked Loop and Frequency Synchronization
The LTC1878 has an internal voltage-controlled oscillator
and phase detector comprising a phase-locked loop. This
allows the top MOSFET turn-on to be locked to the rising
edge of an external frequency source. The frequency range
of the voltage-controlled oscillator is 400kHz to 700kHz. The
phase detector used is an edge sensitive digital type that
provides zero degrees phase shift between the
Figure 5. Phase-Locked Loop Block Diagram
SYNC/
MODE
PHASE
DETECTOR
DIGITAL
PHASE/
FREQUENCY
DETECTOR
2.4V
R
LP
C
LP
VCO
1878 F05
PLL LPF
Figure 4. Relationship Between Oscillator
Frequency and Voltage at PLL LPF Pin
0
0.4
0.8
V
PLL LPF
(V)
1.2
1.6
2.0
800
700
600
500
400
300
O
1878 F04
If the external frequency (V
SYNC/MODE
) is greater than
550kHz, the center frequency, current is sourced
continuously, pulling up the PLL LPF pin. When the
external frequency is less than 550kHz, current is sunk
continuously, pulling down the PLL LPF pin. If the
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