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參數(shù)資料
| 型號： | LTC1871EMS#PBF-1 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封裝： | LEAD FREE, PLASTIC, MSOP-10 |
| 文件頁數(shù)： | 36/36頁 |
| 文件大小： | 354K |
| 代理商： | LTC1871EMS#PBF-1 |
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9
LTC1871-1
18711fa
OPERATIO
U
Programming the Operating Mode
For applications where maximizing the efficiency at very
light loads (e.g., <100
μA) is a high priority, the current in
the output divider could be decreased to a few micro-
amps and Burst Mode operation should be applied (i.e.,
the MODE/SYNC pin should be connected to ground). In
applications where fixed frequency operation is more
critical than low current efficiency, or where the lowest
output ripple is desired, pulse-skip mode operation should
be used and the MODE/SYNC pin should be connected to
the INTVCC pin. This allows discontinuous conduction
mode (DCM) operation down to near the limit defined by
the chip’s minimum on-time (about 175ns). Below this
output current level, the converter will begin to skip
cycles in order to maintain output regulation. Figures 3
and 4 show the light load switching waveforms for Burst
Mode and pulse-skip mode operation for the converter in
Figure 1.
Burst Mode Operation
Burst Mode operation is selected by leaving the MODE/
SYNC pin unconnected or by connecting it to ground. In
normal operation, the range on the ITH pin corresponding
to no load to full load is 0.30V to 1.2V. In Burst Mode
operation, if the error amplifier EA drives the ITH voltage
below 0.525V, the buffered ITH input to the current com-
parator C1 will be clamped at 0.525V (which corresponds
to 25% of maximum load current). The inductor current
peak is then held at approximately 30mV divided by the
power MOSFET RDS(ON). If the ITH pin drops below 0.175V,
the Burst Mode comparator B1 will turn off the power
MOSFET and scale back the quiescent current of the IC to
250
μA(sleepmode).Inthiscondition,theloadcurrentwill
be supplied by the output capacitor until the ITH voltage
rises above the 50mV hysteresis of the burst comparator.
At light loads, short bursts of switching (where the aver-
age inductor current is 20% of its maximum value) fol-
lowed by long periods of sleep will be observed, thereby
greatly improving converter efficiency. Oscilloscope wave-
forms illustrating Burst Mode operation are shown in
Figure 3.
Pulse-Skip Mode Operation
With the MODE/SYNC pin tied to a DC voltage above 2V,
Burst Mode operation is disabled. The internal, 0.525V
buffered ITH burst clamp is removed, allowing the ITH pin
to directly control the current comparator from no load to
full load. With no load, the ITH pin is driven below 0.175V,
the power MOSFET is turned off and sleep mode is
invoked. Oscilloscope waveforms illustrating this mode of
operation are shown in Figure 4.
When an external clock signal drives the MODE/SYNC pin
at a rate faster than the chip’s internal oscillator, the
oscillator will synchronize to it. In this synchronized mode,
Burst Mode operation is disabled. The constant frequency
associated with synchronized operation provides a more
controlled noise spectrum from the converter, at the
expense of overall system efficiency of light loads.
10
μs/DIV
1871 F03
Figure 3. LTC1871-1 Burst Mode Operation
(MODE/SYNC = 0V) at Low Output Current
Figure 4. LTC1871-1 Low Output Current Operation with
Burst Mode Operation Disabled (MODE/SYNC = INTVCC)
VOUT
50mV/DIV
IL
5A/DIV
VIN = 3.3V
VOUT = 5V
IOUT = 500mA
MODE/SYNC = 0V
(Burst Mode OPERATION)
VOUT
50mV/DIV
IL
5A/DIV
VIN = 3.3V
VOUT = 5V
IOUT = 500mA
MODE/SYNC = INTVCC
(PULSE-SKIP MODE)
2
μs/DIV
1871 F04
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