參數(shù)資料
型號(hào): LTC1864CS8
英文描述: A/D CONVERTER
中文描述: 的A / D轉(zhuǎn)換器
文件頁(yè)數(shù): 3/20頁(yè)
文件大小: 278K
代理商: LTC1864CS8
11
LTC1864/LTC1865
18645f
GENERAL ANALOG CONSIDERATIONS
Grounding
The LTC1864/LTC1865 should be used with an analog
ground plane and single point grounding techniques. Do
not use wire wrapping techniques to breadboard and
evaluate the device. To achieve the optimum performance,
use a printed circuit board. The ground pins (AGND and
DGND for the LTC1865 MSOP package and GND for the
LTC1864 and LTC1865 SO-8 package) should be tied
directly to the analog ground plane with minimum lead
length.
Bypassing
For good performance, the VCC and VREF pins must be free
of noise and ripple. Any changes in the VCC/VREF voltage
with respect to ground during the conversion cycle can
induce errors or noise in the output code. Bypass the VCC
and VREF pins directly to the analog ground plane with a
minimum of 1
F tantalum. Keep the bypass capacitor
leads as short as possible.
Analog Inputs
Because of the capacitive redistribution A/D conversion
techniques used, the analog inputs of the LTC1864/
LTC1865 have capacitive switching input current spikes.
These current spikes settle quickly and do not cause a
problem if source resistances are less than 200
or high
speed op amps are used (e.g., the LT
1211, LT1469,
LT1807, LT1810, LT1630, LT1226 or LT1215). But if large
source resistances are used, or if slow settling op amps
drive the inputs, take care to ensure the transients caused
by the current spikes settle completely before the conver-
sion begins.
APPLICATIO S I FOR ATIO
WU
UU
0V
1LSB
V
CC
2LSB
V
CC
1LSB
V
CC
VIN*
*VIN = (SELECTED “+” CHANNEL) –
(SELECTED “–” CHANNEL)
REFER TO TABLE 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0
1864 F05
Figure 5. LTC1865 Transfer Curve
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