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參數(shù)資料
| 型號： | LTC1863LCGN#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 8CH 175KSPS 16SSOP |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 175k |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 2.7mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個單端，單極；8 個單端，雙極；4 個差分，單極；4 個差分，雙極 |
| 產(chǎn)品目錄頁面： | 1347 (CN2011-ZH PDF) |
LTC1863L/LTC1867L
5
1863l7lfc
TYPICAL PERFORMANCE CHARACTERISTICS
TIMING CHARACTERISTICS The ● denotes the specications which apply over the full operating temperature
range, otherwise specications are at TA = 25°C. (Note 5)
Note 4: When these pin voltages are taken below GND, they will be
clamped by internal diodes. This product can handle input currents of
greater than 100mA below GND without latchup. These pins are not
clamped to VDD.
Note 5: VDD = 2.7V, fSAMPLE = 175ksps and fSCK = 20MHz at 25°C,
tr = tf = 5ns and VIN– = 1.25V for bipolar mode unless otherwise specied.
Note 6: Linearity, offset and gain error specications apply for both
unipolar and bipolar modes. The INL and DNL are tested in bipolar mode.
Note 7: Integral nonlinearity is dened as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Unipolar offset is the offset voltage measured from +1/2LSB
when the output code ickers between 0000 0000 0000 0000 and
0000 0000 0000 0001 for LTC1867L and between 0000 0000 0000
and 0000 0000 0001 for LTC1863L. Bipolar offset is the offset voltage
measured from –1/2LSB when output code ickers between 0000 0000
0000 0000 and 1111 1111 1111 1111 for LTC1867L, and between
0000 0000 0000 and 1111 1111 1111 for LTC1863L.
Note 9: Recommended operating conditions. The input range of ±1.25V
for bipolar mode is measured with respect to VIN– = 1.25V. For unipolar
mode, common mode input range is 0V to VDD for the positive input and
0V to 1.5V for the negative input. For bipolar mode, common mode input
range is 0V to VDD for both positive and negative inputs.
Note 10: Guaranteed by design, not subject to test.
Note 11: t2 of 47ns maximum allows fSCK up to 10MHz for rising capture
with 50% duty cycle and fSCK up to 20MHz for falling capture (with 3ns
setup time for the receiving logic).
(LTC1867L)
OUTPUT CODE
0
INL
(LSB)
0
0.5
1.0
65536
1863L7L G01
–0.5
–1.0
–2.0
16384
32768
49152
–1.5
2.0
1.5
VDD = 2.7V
fSAMPLE = 175ksps
OUTPUT CODE
0
DNL
(LSB)
0
0.5
1.0
65536
1863L7L G02
–0.5
–1.0
–2.0
16384
32768
49152
–1.5
2.0
1.5
VDD = 2.7V
fSAMPLE = 175ksps
FREQUENCY (kHz)
0
–60
–40
0
65.625
1863L7L G03
–80
–100
21.875
43.75
87.5
–120
–140
–20
AMPLITUDE
(dB)
fSAMPLE = 175ksps
fIN = 1kHz
SNR = 82.9dB
SINAD = 81.4dB
THD = 86.8dB
Integral Nonlinearity
vs Output Code
Differential Nonlinearity
vs Output Code
4096 Points FFT Plot
(VDD = 2.7V, Internal REF)
FREQUENCY (kHz)
0
–60
–40
0
65.625
1863L7L G04
–80
–100
21.875
43.75
87.5
–120
–140
–20
AMPLITUDE
(dB)
fSAMPLE = 175ksps
fIN = 1kHz
SNR = 84.7dB
SINAD = 83.5dB
THD = 90dB
ACTIVE CHANNEL INPUT FREQUENCY (kHz)
–120
RESULTING
AMPLITUDE
ON
SELECTED
CHANNEL
(dB)
–100
–90
–70
–60
0.1
10
100
1000
1863L7L G05
–140
1
–80
–110
–130
VDD = 3V
fSAMPLE = 175ksps
ADJACENT PAIR
NONADJACENT
PAIR
INPUT FREQUENCY (kHz)
1
20
AMPLITUDE
(dB)
40
60
100
10
100
1863L7L G06
80
30
50
90
70
VDD = 3V
INTERNAL REF
fSAMPLE = 175ksps
SNR
SINAD
4096 Points FFT Plot
(VDD = 3V, REFCOMP = Ext 3V)
Crosstalk vs Input Frequency
Signal-to-(Noise + Distortion)
Ratio vs Input Frequency
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