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參數(shù)資料
| 型號： | LTC1863 |
| 廠商： | Linear Technology Corporation |
| 元件分類： | ADC |
| 英文描述： | 12-/16-Bit, 8-Channel 200ksps ADCs |
| 中文描述： | 12-/16-Bit，8通道高達200ksps模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大小： | 314K |
| 代理商： | LTC1863 |
LTC1863/LTC1867
8
18637f
TW
U
W
t
5
(SDI Setup Time Before SCK
↑
),
t
6
(SDI Hold Time After SCK
↑
)
t
5
50%
50%
t
3
0.4V
t
7
(SLEEP Mode Wake-Up Time)
t
7
SCK
CS/CONV
t
8
(BUS Relinquish Time)
t
8
CS/CONV
SDO
2.4V
t
4
(SDO Valid After CONV
↓
)
t
4
CS/CONV
SDO
2.4V
0.4V
0.4V
t
6
2.4V
0.4V
SCK
SDI
2.4V
0.4V
2.4V
2.4V
0.4V
SDO
1867 TD
SLEEP BIT (SLP = 0)
READ-IN
10%
90%
Hi-Z
Hi-Z
t1
(For Short Pulse Mode)
t
2
(SDO Valid Before SCK
↑
),
t
3
(SDO Valid Hold Time After SCK
↓
)
t
1
CS/CONV
t
2
SCK
50%
50%
Overview
The LTC1863/LTC1867 are complete, low power multi-
plexed ADCs. They consist of a 12-/16-bit, 200ksps ca-
pacitive successive approximation A/D converter, a preci-
sion internal reference, a configurable 8-channel analog
input multiplexer (MUX) and a serial port for data transfer.
Conversions are started by a rising edge on the CS/CONV
input. Once a conversion cycle has begun, it cannot be
restarted. Between conversions, the ADCs receive an input
word for channel selection and output the conversion
result, and the analog input is acquired in preparation for
the next conversion. In the acquire phase, a minimum time
of 1.5
μ
s will provide enough time for the sample-and-hold
capacitors to acquire the analog signal.
During the conversion, the internal differential 16-bit
capacitive DAC output is sequenced by the SAR from the
most significant bit (MSB) to the least significant bit
(LSB). The input is sucessively compared with the binary
weighted charges supplied by the differential capacitive
DAC. Bit decisions are made by a low-power, differential
comparator. At the end of a conversion, the DAC output
balances the analog input. The SAR contents (a 12-/16-bit
data word) that represent the analog input are loaded into
the 12-/16-bit output latches.
APPLICATIOU
W
U
U
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LTC1863CGN | 12-/16-Bit, 8-Channel 200ksps ADCs |
| LTC1863IGN | 12-/16-Bit, 8-Channel 200ksps ADCs |
| LTC1864 | 12-/16-Bit, 8-Channel 200ksps ADCs |
| LTC1864L | 12-/16-Bit, 8-Channel 200ksps ADCs |
| LTC1865 | 12-/16-Bit, 8-Channel 200ksps ADCs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC1863CGN | 功能描述:IC ADC 12BIT 8CH 200KSPS 16SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| LTC1863CGN#PBF | 功能描述:IC ADC 12BIT 8CH 200KSPS 16SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| LTC1863CGN#PBF | 制造商:Linear Technology 功能描述:IC, ADC, 12BIT, 200KSPS, SSOP-16 |
| LTC1863CGN#TR | 功能描述:IC ADC 12BIT 8CH 200KSPS 16SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| LTC1863CGN#TRPBF | 功能描述:IC ADC 12BIT 8CH 200KSPS 16SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
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