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參數資料
| 型號： | LTC1852 |
| 廠商： | Linear Technology Corporation |
| 元件分類： | ADC |
| 英文描述： | 12-/16-Bit, 8-Channel 200ksps ADCs |
| 中文描述： | 12-/16-Bit，8通道高達200ksps模數轉換器 |
| 文件頁數： | 4/16頁 |
| 文件大?。?/td> | 314K |
| 代理商： | LTC1852 |
LTC1863/LTC1867
4
18637f
SYMBOL
V
DD
I
DD
PARAMETER
Supply Voltage
Supply Current
CONDITIONS
(Note 9)
f
SAMPLE
= 200ksps
NAP Mode
SLEEP Mode
MIN
4.75
TYP
MAX
5.25
1.8
UNITS
V
G
1.3
150
0.2
6.5
mA
μ
A
μ
A
mW
G
3
9
P
DISS
TIW
range, otherwise specifications are at T
A
= 25
°
C. (Note 5)
Power Dissipation
G
The
G
denotes the specifications which apply over the full operating temperature
SYMBOL
f
SAMPLE
t
CONV
t
ACQ
f
SCK
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
PARAMETER
Maximum Sampling Frequency
Conversion Time
Acquisition Time
SCK Frequency
CS/CONV High Time
SDO Valid After SCK
↓
SDO Valid Hold Time After SCK
↓
SDO Valid After CS/CONV
↓
SDI Setup Time Before SCK
↑
SDI Hold Time After SCK
↑
SLEEP Mode Wake-Up Time
Bus Relinquish Time After CS/CONV
↑
CONDITIONS
MIN
200
TYP
MAX
UNITS
kHz
G
G
3
3.5
μ
s
μ
s
G
1.5
1.1
40
MHz
ns
ns
ns
ns
ns
ns
ms
ns
Short CS/CONV Pulse Mode
C
L
= 25pF (Note 11)
C
L
= 25pF
C
L
= 25pF
G
40
100
13
11
10
–6
4
60
20
G
22
G
5
G
30
G
15
10
G
C
REFCOMP
= 10
μ
F, C
VREF
= 2.2
μ
F
C
L
= 25pF
G
40
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All voltage values are with respect to GND (unless otherwise
noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA without latchup.
Note 4:
When these pin voltages are taken below GND, they will be
clamped by internal diodes. This product can handle input currents of
greater than 100mA below GND without latchup. These pins are not
clamped to V
DD
.
Note 5:
V
DD
= 5V, f
SAMPLE
= 200ksps at 25
°
C, t
r
= t
f
= 5ns and
V
IN
– = 2.5V for bipolar mode unless otherwise specified.
Note 6:
Linearity, offset and gain error specifications apply for both
unipolar and bipolar modes. The INL and DNL are tested in bipolar mode.
Note 7:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8:
Unipolar offset is the offset voltage measured from +1/2LSB
whenthe output code flickers between 0000 0000 0000 0000 and
0000 0000 00000001 for LTC1867 and between 0000 0000 0000 and
0000 0000 0001 for LTC1863. Bipolar offset is the offset voltage
measured from –1/2LSB when output code flickers between 0000 0000
0000 0000 and 1111 1111 1111 1111 for LTC1867, and between
0000 0000 0000 and 1111 1111 1111 for LTC1863.
Note 9:
Recommended operating conditions. The input range of
±
2.048V
for bipolar mode is measured with respect to V
IN
– = 2.5V.
Note 10:
Guaranteed by design, not subject to test.
Note 11:
t
2
of 25ns maximum allows f
SCK
up to 20MHz for rising capture
with 50% duty cycle and f
SCK
up to 40MHz for falling capture (with 3ns
setup time for the receiving logic).
POWER REQUIREW
range, otherwise specifications are at T
A
= 25
°
C. (Note 5)
U
The
G
denotes the specifications which apply over the full operating temperature
LTC1863/LTC1867/LTC1867A
LTC1863/LTC1867/LTC1867A
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