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參數資料
| 型號： | LTC1799CS5#TRMPBF |
| 廠商： | Linear Technology |
| 文件頁數： | 14/14頁 |
| 文件大小： | 0K |
| 描述： | IC OSC SILICON 33MHZ TSOT23-5 |
| 產品目錄繪圖： | TSOT23-5 Series Top |
| 標準包裝： | 1 |
| 類型： | 振蕩器 - 硅 |
| 頻率： | 1kHz ~ 33MHz |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 電流 - 電源： | 7mA |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | SOT-23-5 細型，TSOT-23-5 |
| 包裝： | 標準包裝 |
| 供應商設備封裝： | TSOT-23-5 |
| 安裝類型： | 表面貼裝 |
| 產品目錄頁面： | 1715 (CN2011-ZH PDF) |
| 其它名稱： | LTC1799CS5#TRMPBFDKR |
LTC1799
9
1799fc
applicaTions inForMaTion
Jitter
The typical jitter is listed in the Electrical Characteristics
and shown in the Typical Performance Characteristics.
These specifications assume that the capacitance on SET
(Pin 3) is limited to less than 10pF, as suggested in the Pin
Functions description. If this requirement is not met, the
jitter will increase. For more information, contact Linear
Technology Applications group.
A Ground Referenced Voltage Controlled Oscillator
TheLTC1799outputfrequencycanalsobeprogrammedby
steering current in or out of the SET pin, as conceptually
shown in Figure 8. This technique can degrade accuracy
as the ratio of (V+ – VSET) / IRES is no longer uniquely
dependent of the value of RSET, as shown in the LTC1799
Block Diagram. This loss of accuracy will become notice-
able when the magnitude of IPROG is comparable to IRES.
The frequency variation of the LTC1799 is still monotonic.
Figure 9 shows how to implement the concept shown in
Figure 8 by connecting a second resistor, RIN, between
the SET pin and a ground referenced voltage source, VIN.
For a given power supply voltage in Figure 9, the output
frequency of the LTC1799 is a function of VIN, RIN, RSET
and (V+ – VSET) = VRES:
fOSC =
10MHz
N
10k
RIN RSET
1
+
VIN V+
(
)
VRES
1
+
RIN
RSET
(1)
When VIN = V+, the output frequency of the LTC1799 as-
sumes the highest value and it is set by the parallel com-
bination of RIN and RSET. Also note, the output frequency,
fOSC, is independent of the value of VRES = (V+ – VSET) so
the accuracy of fOSC is within the data sheet limits.
When VIN is less than V+, and especially when VIN ap-
proaches the ground potential, the oscillator frequency,
fOSC, assumes its lowest value and its accuracy is affected
by the change of VRES = (V+ – VSET). At 25°C VRES varies
by ±8%, assuming the variation of V+ is ±5%. The tem-
perature coefficient of VRES is 0.02%/°C.
By manipulating the algebraic relation for fOSC above, a
simplealgorithmcanbederivedtosetthevaluesofexternal
resistors RSET and RIN, as shown in Figure 9.
1. Choose the desired value of the maximum oscillator
frequency, fOSC(MAX), occurring at maximum input
voltage VIN(MAX) ≤ V+.
2. Set the desired value of the minimum oscillator fre-
quency, fOSC(MIN), occurring at minimum input voltage
VIN(MIN) ≥ 0.
3. Choose VRES = 1.1 and calculate the ratio of RIN/RSET
from the following:
RIN
RSET
=
VIN(MAX) V+
(
) fOSC(MAX)
fOSC(MIN)
VIN(MIN) V
+
(
)
VRES
fOSC(MAX)
(
)
fOSC(MIN)
1
1 (2)
Figure 9. Implementation of Concept Shown in Figure 8
Figure 8. Concept for Programming via Current Steering
V+
1
2
RSET
IPR
3
5
5V
V+
1799 F08
4
GND
LTC1799
0.1F
OPEN
SET
OUT
DIV
÷10
÷100
÷1
IRES
V+
1
2
RSET
VRES
RIN
VIN
3
5
5V
V+
1799 F09
4
GND
LTC1799
0.1F
fOSC
OPEN
SET
OUT
DIV
÷10
÷100
÷1
+
–
+
–
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