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參數(shù)資料
| 型號(hào)： | LTC1756EGN#PBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 16/16頁(yè) |
| 文件大小： | 0K |
| 描述： | IC SMART CARD INTERFACE 16SSOP |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 應(yīng)用： | 智能卡 |
| 電源電壓： | 2.7 V ~ 6 V |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SSOP |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
| 產(chǎn)品目錄頁(yè)面： | 1355 (CN2011-ZH PDF) |
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9
LTC1755/LTC1756
The READY pin is configured as an open-drain pull-down
with a weak pull-up current source. This permits wired-
OR connections of multiple LTC1755/LTC1756s to a
single microcontroller.
ALARM (Pin 22, LTC1755 Only): (Output) A low on this
pin indicates that a fault has occurred and that the LTC1755
is in the Alarm state (see the State Diagram). Possible
faults include VCC underrange for at least 5s, overtem-
perature shutdown, CLK or RST invalid output levels, and
card removal during the Active state.
CLK or RST invalid and overtemperature faults are de-
tected only after VCC has reached its final value (as
indicated by the READY pin). VCC underrange and card
removal during Active faults are detected at any time
during the Active period (i.e., once PWR = 0V).
The ALARM pin is configured as an open-drain pull-down
with a weak pull-up current source. This permits wired-
OR connections of multiple LTC1755s to a single micro-
controller.
UU
U
PI FU CTIO S LTC1755/LTC1756
CARD (Pin 23/15): (Output) Level-Shifted and Debounced
PRES Signal from the Smart Card Acceptor Switch. When
a valid card indication appears, this pin communicates the
presence of the Smart Card to the microcontroller. The
CARD pin has an open-drain active pull-down with a weak
pull-up current source for logic-OR connections. The
debounce circuit ensures that a card has been present for
a continuous period of at least 40ms before asserting
CARD low. The CARD pin returns high within 50
s of card
removal. The PRES pin, in conjunction with the NC/NO pin,
determines if a card is present.
5V/3V (Pin 24/16): (Input) Controls the output voltage
(VCC) of the DC/DC converter during the Active state. A
valid high sets VCC to 5V. A valid low sets VCC to 3V. The
5V/3V pin is latched on the falling edge of the PWR pin.
When PWR is low, changes on the 5V/3V pin are ignored.
To change the voltage on VCC the LTC1755/LTC1756 must
first be returned to the Idle state by bringing the PWR pin
high.
DVCC sets the logic reference level for the 5V/3V pin.
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