t0 ENC Period (Note 9) q 12.5 2000 ns
參數(shù)資料
型號: LTC1748IFW#TRPBF
廠商: Linear Technology
文件頁數(shù): 15/20頁
文件大?。?/td> 0K
描述: IC ADC 14BIT 80MSPS 48-TSSOP
標(biāo)準(zhǔn)包裝: 1,800
位數(shù): 14
采樣率(每秒): 80M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 1.55W
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個單端,雙極;1 個差分,雙極
4
LTC1748
1748fa
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t0
ENC Period
(Note 9)
q
12.5
2000
ns
t1
ENC High
(Note 8)
q
6
1000
ns
t2
ENC Low
(Note 8)
q
6
1000
ns
t3
Aperture Delay
(Note 8)
0
ns
t4
ENC to CLKOUT Falling
CL = 10pF (Note 8)
q
1
2.4
4
ns
t5
ENC to CLKOUT Rising
CL = 10pF (Note 8)
t1 + t4
ns
For 80Msps 50% Duty Cycle
CL = 10pF (Note 8)
q
7.25
8.65
10.25
ns
t6
ENC to DATA Delay
CL = 10pF (Note 8)
q
2
4.9
7.2
ns
t7
ENC to DATA Delay (Hold Time)
(Note 8)
q
1.4
3.4
4.7
ns
t8
ENC to DATA Delay (Setup Time)
CL = 10pF (Note 8)
t0 – t6
ns
For 80Msps 50% Duty Cycle
CL = 10pF (Note 8)
q
5.3
7.6
10.5
ns
t9
CLKOUT to DATA Delay (Hold Time),
(Note 8)
q
6ns
80Msps 50% Duty Cycle
t10
CLKOUT to DATA Delay (Setup Time),
CL = 10pF (Note 8)
q
2.1
ns
80Msps 50% Duty Cycle
t11
DATA Access Time After OE
CL = 10pF (Note 8)
10
25
ns
t12
BUS Relinquish
(Note 8)
10
25
ns
Data Latency
5
cycles
The q indicates specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
TI I G CHARACTERISTICS
U
W
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VDD
Positive Supply Voltage
4.75
5.25
V
IDD
Positive Supply Current
q
280
310
mA
PDIS
Power Dissipation
q
1.4
1.55
W
OVDD
Digital Output Supply Voltage
0.5
VDD
V
The q indicates specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
POWER REQUIRE E TS
W
U
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIH
High Level Input Voltage
VDD = 5.25V, MSBINV and OE
q
2.4
V
VIL
Low Level Input Voltage
VDD = 4.75V, MSBINV and OE
q
0.8
V
IIN
Digital Input Current
VIN = 0V to VDD
q
±10
A
CIN
Digital Input Capacitance
MSBINV and OE Only
1.5
pF
VOH
High Level Output Voltage
OVDD = 4.75V
IO = –10A
4.74
V
IO = – 200A
q
4
4.74
V
VOL
Low Level Output Voltage
OVDD = 4.75V
IO = 160A
0.05
V
IO = 1.6mA
q
0.1
0.4
V
IOZ
Hi-Z Output Leakage D13 to D0
VOUT = 0V to VDD, OE = High
q
±10
A
COZ
Hi-Z Output Capacitance D13 to D0
OE = High (Note 8)
q
15
pF
ISOURCE
Output Source Current
VOUT = 0V
– 50
mA
ISINK
Output Sink Current
VOUT = 5V
50
mA
The q indicates specifications which apply over the full
operating temperature range, otherwise specifications are at TA = 25°C. (Note 5)
DIGITAL I PUTS A D DIGITAL OUTPUTS
U
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