參數(shù)資料
型號(hào)： LTC1736C
廠商： Linear Technology Corporation
元件分類： 基準(zhǔn)電壓源/電流源
英文描述： Isolated Flyback Switching Regulator with 9V Output
中文描述： 隔離反激式開關(guān)穩(wěn)壓9V輸出
文件頁(yè)數(shù)： 3/28頁(yè)
文件大?。?/td> 322K
代理商： LTC1736C
3
LTC1736
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T
A
= 25
°
C. V
IN
= 15V, V
RUN/SS
= 5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
BG Transition Time:
(Note 9)
BG t
r
Rise Time
C
LOAD
= 3300pF
BG t
f
Fall Time
C
LOAD
= 3300pF
TG/BG T1D
Top Gate Off to Synchronous
C
LOAD
= 3300pF Each Driver
Gate-On Delay Time
TG/BG T2D
Synchronous Gate Off to Top
C
LOAD
= 3300pF Each Driver
Gate-On Delay Time
Internal V
CC
Regulator
V
INTVCC
Internal V
CC
Voltage
6V < V
IN
< 30V, V
EXTVCC
= 4V
V
LDO(INT)
Internal V
CC
Load Regulation
I
CC
= 0mA to 20mA, V
EXTVCC
= 4V
V
LDO(EXT)
EXTV
CC
Drop Voltage
I
CC
= 20mA, V
EXTVCC
= 5V
V
EXTVCC
EXTV
CC
Switchover Voltage
I
CC
= 20mA, EXTV
CC
Ramping Positive
V
EXTVCC(HYS)
EXTV
CC
Hysteresis
Oscillator
f
OSC
Oscillator Frequency
(Note 5), C
OSC
= 43pF
f
H
/f
OSC
Maximum Sync Frequency Ratio
f
FCB(SYNC)
FCB Pin Threshold For Sync
Ramping Negative
PGOOD Output
V
PGL
PGOOD Voltage Low
I
PGOOD
= 2mA
I
PGOOD
PGOOD Leakage Current
V
PGOOD
= 5V
V
PG
PGOOD Trip Level
V
OSENSE
with Respect to Set Output Voltage
V
OSENSE
Ramping Negative
V
OSENSE
Ramping Positive
VID Control
VIDV
CC
VID Operating Supply Voltage
I
VIDVCC
VID Supply Current
(Note 6) VIDV
CC
= 3.3V
R
VFB/VOSENSE
Resistance Between V
OSENSE
and V
FB
R
RATIO
Resistor Ratio Accuracy
Programmed from 0.925V to 2.00V
R
PULL-UP
VID0 to VID4 Pull-Up Resistance
(Note 7) V
DIODE
= 0.6V
V
IDT
VID Input Voltage Threshold
I
VIDLEAK
VID Input Leakage Current
(Note 7) VIDV
CC
< VID < 7V
V
PULL-UP
VID Pull-Up Voltage
VIDV
CC
= 3.3V
VIDV
CC
= 5V
The
G
denotes specifications which apply over the full operating
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formulas:
LTC1736CG, LTC1736IG: T
J
= T
A
+ (P
D
110
°
C/W)
Note 3:
The LTC1736 is tested in a feedback loop that servos V
FB
to the
balance point for the error amplifier (V
ITH
= 1.2V).
Note 4:
Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 5:
Oscillator frequency is tested by measuring the C
OSC
charge
current (I
OSC
) and applying the formula:
Note 6:
With all five VID inputs floating (or tied to VIDV
CC
) the VIDV
CC
current is typically <1
μ
A. However, the VIDV
CC
current will rise and be
approximately equal to the number of grounded VID input pins times
(VIDV
CC
– 0.6V)/40k. (See the Applications Information section for more
detail.)
Note 7:
Each built-in pull-up resistor attached to the VID inputs also has a
series diode to allow input voltages higher than the VIDV
CC
supply without
damage or clamping. (See the Applications Information section for more
detail.)
Note 8:
The minimum on-time condition corresponds to the on inductor
peak-to-peak ripple current
≥
40% of I
MAX
(see minimum on-time
considerations in the Applications Information section).
Note 9:
Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
f
C
pF
(
I
I
OSC
OSC
CHG
DIS
=
+
+
8 477 10
.
11
1
1
11
1
(
)
)
–
MIN
TYP
MAX
UNITS
50
40
100
90
80
ns
ns
ns
70
ns
5.0
5.2
0.2
130
4.7
0.2
5.4
1
200
V
%
mV
G
4.5
V
V
265
300
1.3
1.2
335
kHz
0.9
V
110
200
±
1
mV
μ
A
–6.0
6.0
–7.5
7.5
–9.5
9.5
%
%
2.7
5.5
5
V
0.01
10
±
0.05
40
1.0
0.01
2.8
4.5
μ
A
k
%
k
0.4
1.6
±
1
V
μ
A
V
V
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LTC1736 Isolated Flyback Switching Regulator with 9V Output
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