參數(shù)資料
型號(hào)： LTC1708-PG
廠商： Linear Technology Corporation
英文描述： Dual Adjustable 5-Bit VID High Efficiency, 2-Phase Current Mode Synchronous Buck Regulator Controller
中文描述： 可調(diào)式雙5位VID高效率，2相電流模式同步降壓穩(wěn)壓控制器
文件頁(yè)數(shù)： 21/32頁(yè)
文件大?。?/td> 358K
代理商： LTC1708-PG
21
LTC1708-PG
APPLICATIU
If the condition lasts for a long enough period as deter-
mined by the size of the C
SS
and the specified discharge
current, the controller will be shut down until the RUN/SS
pin voltage is recycled. If the overload occurs during start-
up, the time can be approximated by:
t
LO1
≈
[C
SS
(4.1 – 1.5 + 4.1 – 3.5)]/(1.2
μ
A)
= 2.7 10
6
(C
SS
)
If the overload occurs after start-up the voltage on C
SS
will
begin discharging from the zener clamp voltage:
t
LO2
≈
[C
SS
(6 – 3.5)]/(1.2
μ
A) = 2.1 10
6
(C
SS
)
This built-in overcurrent latchoff can be overridden by
providing a pull-up resistor to the RUN/SS pin as shown
in Figure 7. This resistance shortens the soft-start period
and prevents the discharge of the RUN/SS capacitor
during an over current condition. Tying this pull-up resis-
tor to V
IN
as in Figure 7a, defeats overcurrent latchoff.
Diode-connecting this pull-up resistor to INTV
CC
, as in
Figure 7b, eliminates any extra supply current during
controller shutdown while eliminating the INTV
CC
loading
from preventing controller start-up.
Why should you defeat overcurrent latchoff During the
prototyping stage of a design, there may be a problem
with noise pickup or poor layout causing the protection
circuit to latch off. Defeating this feature will easily allow
troubleshooting of the circuit and PC layout. The internal
short-circuit and foldback current limiting still remains
active, thereby protecting the power supply system from
failure. After the design is complete, a decision can be
made whether to enable the latchoff feature.
The value of the soft-start capacitor C
SS
may need to be
scaled with output voltage, output capacitance and load
current characteristics. The minimum soft-start capaci-
tance is given by:
C
SS
> (C
OUT
)(V
OUT
) (10
–4
) (R
SENSE
)
The minimum recommended soft-start capacitor of
C
SS
= 0.1
μ
F will be sufficient for most applications.
W
U
U
Fault Conditions: Current Limit and Current Foldback
The LTC1708 current comparator has a maximum sense
voltage of 75mV resulting in a maximum MOSFET current
of 75mV/R
SENSE
. The maximum value of current limit
generally occurs with the largest V
IN
at the highest ambi-
ent temperature, conditions that cause the highest power
dissipation in the top MOSFET.
The LTC1708 includes current foldback to help further
limit load current when the output is shorted to ground.
The foldback circuit is active even when the overload
shutdown latch described above is overridden. If the
output falls below 70% of its nominal output level, then the
maximum sense voltage is progressively lowered from
75mV to 25mV. Under short-circuit conditions with very
low duty cycles, the LTC1708 will begin cycle skipping in
order to limit the short-circuit current. In this situation the
bottom MOSFET will be dissipating most of the power but
less than in normal operation. The short-circuit ripple
current is determined by the minimum on-time t
ON(MIN)
of
the LTC1708 (less than 200ns), the input voltage and
inductor value:
I
L(SC)
= t
ON(MIN)
(V
IN
/L)
The resulting short-circuit current is:
I
mV
R
I
SC
SENSE
L SC
=
+
25
1
2
(
)
Fault Conditions: Overvoltage Protection (Crowbar)
The overvoltage crowbar is designed to blow a system
input fuse when the output voltage of the regulator rises
much higher than nominal levels. The crowbar causes
huge currents to flow, that blow the fuse to protect against
a shorted top MOSFET if the short occurs while the
controller is operating.
A comparator monitors the output for overvoltage condi-
tions. The comparator (OV) detects overvoltage faults
greater than 7.5% above the nominal output voltage.
When this condition is sensed, the top MOSFET is turned
off and the bottom MOSFET is turned on until the overvolt-
age condition is cleared. The output of this comparator is
only latched by the overvoltage condition itself and will
therefore allow a switching regulator system having a poor
PC layout to function while the design is being debugged.
The bottom MOSFET remains on continuously for as long
as the OV condition persists; if V
OUT
returns to a safe level,
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