參數(shù)資料
型號(hào): LTC1699EMS8-82
英文描述: Analog IC
中文描述: 模擬IC
文件頁(yè)數(shù): 15/16頁(yè)
文件大?。?/td> 175K
代理商: LTC1699EMS8-82
8
LTC1655/LTC1655L
PIN FUNCTIONS
UU
U
CLK (Pin 1): The TTL Level Input for the Serial Interface
Clock.
DIN (Pin 2): The TTL Level Input for the Serial Interface
Data. Data on the DIN pin is latched into the shift register
on the rising edge of the serial clock and is loaded MSB
first. The LTC1655/LTC1655L requires a 16-bit word.
CS/LD (Pin 3): The TTL Level Input for the Serial Inter-
face Enable and Load Control. When CS/LD is low, the
CLK signal is enabled, so the data can be clocked in.
When CS/LD is pulled high, data is loaded from the shift
register into the DAC register, updating the DAC output.
DOUT (Pin 4): Output of the Shift Register. Becomes valid
on the rising edge of the serial clock and swings from GND
to VCC.
GND (Pin 5): Ground.
REF (Pin 6): Reference. Output of the internal reference is
2.048V (LTC1655), 1.25V (LTC1655L). There is a gain of
two from this pin to the output. The reference can be
overdriven from 2.2V to VCC/2 (LTC1655) and 1.3V to
VCC/2 (LTC1655L). When tied to VCC/2, the output will
swing from GND to VCC. The output can only swing to
within its offset specification of VCC (see Applications
Information).
VOUT (Pin 7): Deglitched Rail-to-Rail Voltage Output. VOUT
clears to 0V on power-up.
VCC (Pin 8): Positive Supply Input. 4.5V ≤ VCC ≤ 5.5V
(LTC1655), 2.7V
≤ VCC ≤ 5.5V (LTC1655L). Requires a
0.1
F bypass capacitor to ground.
TI I G DIAGRA
WU
W
D15
MSB
D14
D13
D1
t1
t6
D0
LSB
t2
t4
t3
t 8
CLK
DIN
DOUT
CS/LD
t5
1655/55L TD
D15
PREVIOUS WORD
D14
PREVIOUS WORD
D0
PREVIOUS WORD
D15
CURRENT WORD
D13
PREVIOUS WORD
t9
t7
12
3
15
16
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