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參數(shù)資料
| 型號(hào)： | LTC1657LIGN#TRPBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 14/16頁(yè) |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT R-R MICROPWR 28SSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 設(shè)置時(shí)間： | 20µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 3.25mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | * |
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LTC1657/LTC1657L
WR (Pin 1): Write Input (Active Low). Used with CSMSB
and/or CSLSB to control the input registers. While WR and
CSMSB and/or CSLSB are held low, data writes into the
input register.
CSLSB (Pin 2): Chip Select Least Significant Byte (Active
Low). Used with WR to control the LSB 8-bit input regis-
ters. While WR and CSLSB are held low, the LSB byte
writes into the LSB input register. Can be connected to
CSMSB for simultaneous loading of both sets of input
latches on a 16-bit bus.
CSMSB (Pin 3): Chip Select Most Significant Byte (Active
Low). Used with WR to control the MSB 8-bit input
registers. While WR and CSMSB are held low, the MSB
byte writes into the MSB input register. Can be connected
to CSLSB for simultaneous loading of both sets of input
latches on a 16-bit bus.
D0 to D7 (Pins 4 to 11): Input data for the Least Significant
Byte. Written into LSB input register when WR = 0 and
CSLSB = 0.
D8 to D15 (Pins 12 to 19): Input data for the Most Signifi-
cant Byte. Written into MSB input register when WR = 0
and CSMSB = 0.
GND (Pin 20): Ground.
REFLO (Pin 21): Lower input terminal of the DAC’s inter-
nal resistor ladder. Typically connected to Analog Ground.
An input code of (0000)H will connect the positive input of
the output buffer to this end of the ladder. Can be used to
offset the zero scale above ground.
REFHI (Pin 22): Upper input terminal of the DAC’s internal
resistor ladder. Typically connected to REFOUT. An input
code of (FFFF)H will connect the positive input of the
output buffer to 1LSB below this voltage.
REFOUT (Pin 23): Output of the internal reference is
2.048V (LTC1657), 1.25V (LTC1657L). Typically con-
nected to REFHI to drive internal DAC resistor ladder.
VCC (Pin 24): Positive Power Supply Input. 4.5V ≤ VCC ≤
5.5V (LTC1657), 2.7V
≤ VCC ≤ 5.5V (LTC1657L). Requires
a 0.1
F bypass capacitor to ground.
VOUT (Pin 25): Buffered DAC Output.
X1/X2 (Pin 26): Gain Setting Resistor Pin. Connect to GND
for G = 2 or to VOUT for G = 1. This pin should always be
tied to a low impedance source, such as ground or VOUT,
to ensure stability of the output buffer when driving
capacitive loads.
UU
U
PI FU CTIO S
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LTC1657 0.1Hz to 10Hz
Voltage Noise
TIME (SEC)
0
1
V/DIV
8
1659 G19
246
10
7
135
9
TIME (SEC)
0
1
V/DIV
8
1659 G20
246
10
7
135
9
LTC1657L 0.1Hz to 10Hz
Voltage Noise
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