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參數(shù)資料
| 型號： | LTC1609ISW#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 20/24頁 |
| 文件大小： | 0K |
| 描述： | IC ADC SRL 16BIT 200KSPS 20-SOIC |
| 標準包裝： | 1,000 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 100mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 20-SOIC |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 3 個單端，單極；3 個單端，雙極 |
5
LTC1609
1609fa
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND, AGND1
and AGND2 wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below ground or above VANA =
VDIG = VDD, they will be clamped by internal diodes. This product can
handle input currents of greater than 100mA below ground or above VDD
without latch-up.
Note 4: When these pin voltages are taken below ground, they will be
clamped by internal diodes. This product can handle input currents of
90mA below ground without latchup. These pins are not clamped to VDD.
Note 5: VDD = 5V, fSAMPLE = 200kHz, tr = tf = 5ns unless otherwise
specified.
Note 6: Linearity, offset and full-scale specifications apply for a VIN input
with respect to ground.
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual end points of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Bipolar zero error is the offset voltage measured from – 0.5 LSB
when the output code flickers between 0000 0000 0000 0000 and 1111
1111 1111 1111. Unipolar zero error is the offset voltage measured from
0.5LSB when the output codes flickers between 0000. . .0000 and 0000. .
.0001.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: With CS low the falling R/C edge starts a conversion. If R/C
returns high at a critical point during the conversion it can create small
errors. For best results ensure that R/C returns high within 1.2
s after the
start of the conversion.
Note 12: As measured with fixed 1% resistors shown in Figures 3a and
3b. Adjustable to zero with external potentiometer.
Note 13: Full-scale error is the worst-case of –FS or +FS untrimmed
deviation from ideal first and last code transitions, divided by the transition
voltage (not divided by the full-scale range) and includes the effect of
offset error. For unipolar input ranges full-scale error is the deviation of
the last code transition from ideal divided by the transiton voltage and
includes the effect of offset error.
Note 14: All specifications in dB are referred to a full-scale
±5V input.
Note 15: Full-power bandwidth is defined as full-scale input frequency at
which a signal-to-(noise + distortion) degrades to 60dB or 10 bits of
accuracy.
Note 16: Recovers to specified performance after (2 FS) input
overvoltage.
Note 17: When data is shifted out during a conversion, with an external
data clock, complete the process within 1.2
s from the start of the
conversion (BUSY falling). This will help keep any external disturbances
from causing an error in the conversion result.
POWER REQUIREMENTS
W
U
LTC1609/LTC1609A
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VDD
Positive Supply Voltage
(Notes 9, 10)
4.75
5.25
V
IDD
Positive Supply Current
PWRD = Low
q
13
20
mA
PDIS
Power Dissipation
PWRD = Low
65
100
mW
PWRD = High
50
W
The q indicates specifications which apply over the full operating temperature range,
otherwise specifications are at TA = 25°C. (Note 5)
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