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參數(shù)資料
| 型號： | LTC1599BIG |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | DAC |
| 英文描述： | 16-Bit Byte Wide, Low Glitch Multiplying DAC with 4-Quadrant Resistors |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 1 us SETTLING TIME, 16-BIT DAC, PDSO24 |
| 封裝： | 0.209 INCH, PLASTIC, SSOP-24 |
| 文件頁數(shù)： | 14/20頁 |
| 文件大?。?/td> | 254K |
| 代理商： | LTC1599BIG |
14
LTC1599
The output current of the DAC is converted to a voltage via
U3 (LT1112), producing 0V to –2.5V at Pin 1 of U3. The
resulting current in Q1 is determined by two elements of
resistor array, R
N1
(3mA max). The emitter of Q1 is
maintained at 0V by the action of U1B.
In applications that do not require 16-bit resolution and
accuracy, the LTC1599 can be replaced by the 14-bit
parallel LTC1591. Furthermore, the resistor array can be
substituted with discrete resistors, and Q2 could be re-
placed by a high gain bipolar PNP; for example, an FZT600
from Zetex.
No trim is provided a shown, as it is expected that software
control is preferable. The output range of 4mA to 20mA is
defined by software, as the full output range is nominally
0mA to 24mA.
U1 is a rail-to-rail amplifier that can operate on suppy
voltages up to 36V. This defines the maximum voltage on
the loop power. If higher loop voltages are required, a
separate low power amplifier at U1A, powered by a zener
regulated supply and referenced to loop power, would
allow voltages up to the breakdown voltages of Q1 and Q2.
APPLICATIO
S I
FOR
ATIO
U
W
U
U
In the example shown, the use of a dual op amp requires
a zener clamp to protect the gate of the MOS power
transistor. If a separate shunt-regulated supply is pro-
vided for the amplifier replacing U1A, the gate clamp (Z1)
is not required.
As shown, this topology uses the LTC1599’s internal
divider (R1 and R2) to reduce the reference from 5V to
2.5V. If a 2.5V reference is used, it can be connected
directly to REF (Pin 1). Alternatively, if the op amp is
powered such that it has –10V output capability, the
divider and amplifier prior to the REF input are not required
and R
OFS
can be used for other purposes such as offset
trim. The two R
N1
resistors at the emitter of Q1 must be
changed in this case.
Note that the output of the current transmitter shows a
network that is intended to provide a first line of defense
against ESD and prevent oscillation (1000pF and 10
)
that could otherwise occur in the power MOSFET if lead
inductance were more than a few inches. C1 should be as
close as possible to Q2. Using MOSFETs that have higher
threshold voltages may require changing Z1 in order to
allow full current output.
V
CC
U2
LTC1599
R
FB
R
FB
R
OFS
R
OFS
5V
7
5
6
6
0.1
μ
F
12
IF 2.5V REF USED CONNECT
DIRECTLY TO REF
4
4
R1
3
R
COM
20
8
2
R2
1
REF
5
6
0.1
μ
F
R
N1
7
10
7
I
OUT1
C3
33pF
–
+
U3
1/2 LT1112
–
+
U1B
1/2 LT1366
–
+
U1A
1/2 LT1366
16-BIT DAC
R1
R2
R
N1
15
2
24V
2
8
1
4
3
C2
100pF
Z1
6.2V
R
N1
LOOP POWER
0.1
μ
F
C1
1000pF
I
OUT
Q2
Si9407AEX
I
OUT2F
I
OUT2S
13
MLBYTE
MLBYTE
WR
14 TO 18,
21 TO 23
8
DATA
INPUTS
LD
LD
12
11
24
10
WR
CLR
CLVL
CLR
CLVL
19
9
DGND
3
1
R
N1
= 400
×
8 RESISTOR ARRAY
1
16
R
N1
9
8
5
6
7
R
N1
R4
1k
R5
10
R3
1k
3
14
4
13
5
12
6
11
R6
1k
Q1
MMBT6429
HFE = 500
2
–
+
1/2 LT1112
LT1460-5
Figure 5. 16-Bit Current Loop Controller for Industrial Applications
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| LTC1599BIN | 16-Bit Byte Wide, Low Glitch Multiplying DAC with 4-Quadrant Resistors |
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| LTC1603CG | High Speed, 16-Bit, 250ksps Sampling A/D Converter with Shutdown |
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| LTC1599BIG#PBF | 功能描述:IC D/A CONV 16BIT MLTPLYNG24SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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