參數(shù)資料
型號: LTC1596ACN
廠商: LINEAR TECHNOLOGY CORP
元件分類: DAC
英文描述: Serial 16-Bit Multiplying DACs
中文描述: SERIAL INPUT LOADING, 1 us SETTLING TIME, 16-BIT DAC, PDIP16
封裝: 0.300 INCH, PLASTIC, DIP-16
文件頁數(shù): 4/12頁
文件大?。?/td> 299K
代理商: LTC1596ACN
4
LTC1595/LTC1596/LTC1596-1
ELECTRICAL CHARACTERISTICS
V
DD
= 5V
±
10%, V
REF
= 10V, V
OUT1
= V
OUT2
= AGND = 0V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
The
G
denotes specifications which apply over the full operating
temperature range.
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
±
1LSB =
±
0.0015% of full scale =
±
15.3ppm of full scale.
Note 3:
Using internal feedback resistor.
Note 4:
Guaranteed by design, not subject to test.
Note 5:
I
OUT1
with DAC register loaded with all 0s.
Note 6:
Typical temperature coefficient is 100ppm/C.
Note 7:
OUT1 load = 100
in parallel with 13pF.
SYMBOL
t
SRI
t
CH
t
CL
t
LD
t
ASB
PARAMETER
Serial Input Data Pulse Width
Clock Pulse Width High
Clock Pulse Width Low
Load Pulse Width
LSB Clocked into Input Register
to DAC Register Load Time
CONDITIONS
MIN
60
60
60
60
0
TYP
MAX
UNITS
G
ns
ns
ns
ns
ns
G
G
G
G
SYMBOL
Timing Characteristics (LTC1596/LTC1596-1)
t
DS1
Serial Input to Strobe Setup Time
t
DS2
t
DS3
t
DS4
t
DH1
Serial Input to Strobe Hold Time
t
DH2
t
DH3
t
DH4
t
SRI
Serial Input Data Pulse Width
t
STB1
to
Strobe Pulse Width
t
STB4
t
STB1
to
Strobe Pulse Width
t
STB4
t
LD1,
t
LD2
LD Pulse Width
t
ASB
LSB Strobed into Input Register
to Load DAC Register Time
t
CLR
Clear Pulse Width
t
PD1
STB1 to SRO Propagation Delay
t
PD
STB2, STB3, STB4 to SRO
Propagation Delay
Power Supply
V
DD
Supply Voltage
I
DD
Supply Current
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
STB1 Used as the Strobe
STB2 Used as the Strobe
STB3 Used as the Strobe
STB4 Used as the Strobe
STB1 Used as the Strobe
STB2 Used as the Strobe
STB3 Used as the Strobe
STB4 Used as the Strobe
G
30
20
25
20
30
40
35
40
60
60
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
G
–5
0
–5
5
15
10
15
G
G
G
G
G
G
G
(Note 11)
G
(Note 12)
G
60
ns
G
60
0
ns
ns
G
G
100
30
30
ns
ns
ns
C
L
= 50pF
C
L
= 50pF
G
150
200
G
G
4.5
5
5.5
10
V
Digital Inputs = 0V or V
DD
G
1.5
μ
A
Note 8:
To 0.0015% for a full-scale change, measured from the falling
edge of LD1, LD2 or LD.
Note 9:
V
REF
= 6V
RMS
at 1kHz. DAC register loaded with all 1s;
op amp = LT1007.
Note 10:
Calculation from e
n
=
4kTRB where: k = Boltzmann constant
(J/
°
K); R = resistance (
); T = temperature (
°
K); B = bandwidth (Hz).
Note 11:
Minimum high time for STB1, STB2, STB4. Minimum low time
for STB3.
Note 12:
Minimum low time for STB1, STB2, STB4. Minimum high time
for STB3.
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