- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗8611 > LTC1596-1CCN (Linear Technology)IC D/A CONV 16BIT MLTPLYNG 16DIP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | LTC1596-1CCN |
| 寤犲晢锛� | Linear Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 3/16闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC D/A CONV 16BIT MLTPLYNG 16DIP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 25 |
| 瑷�(sh猫)缃檪闁擄細 | 1µs |
| 浣嶆暩(sh霉)锛� | 16 |
| 鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� | 涓茶 |
| 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 | 1 |
| 闆诲闆绘簮锛� | 鍠浕婧� |
| 鍔熺巼鑰楁暎锛堟渶澶э級锛� | 55µW |
| 宸ヤ綔婧害锛� | 0°C ~ 70°C |
| 瀹夎椤炲瀷锛� | 閫氬瓟 |
| 灏佽/澶栨锛� | 16-DIP锛�0.300"锛�7.62mm锛� |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 16-PDIP |
| 鍖呰锛� | 绠′欢 |
| 杓稿嚭鏁�(sh霉)鐩拰椤炲瀷锛� | 1 闆绘祦锛屽柈妤碉紱1 闆绘祦锛岄洐妤� |
| 閲囨ǎ鐜囷紙姣忕锛夛細 | * |
LTC1595/LTC1596/LTC1596-1
11
159561fb
applicaTions inForMaTion
Bipolar (4-Quadrant Multiplying) Mode
(VOUT = 鈥揤REF to VREF)
The LTC1595/LTC1596 can be used with a dual op amp
and three external resistors to provide 4-quadrant multi-
plying operation as shown in Figure 2 (last page). With a
fixed 10V reference, the circuits shown give a precision
bipolar 鈥�10V to 10V output swing. Using the LTC1596-1
will cause the power-on reset and clear pin to reset the
DAC to mid-scale (bipolar zero).
Op Amp Selection
Because of the extremely high accuracy of the 16-bit
LTC1595/LTC1596, thought should be given to op amp
selection in order to achieve the exceptional performance
of which the part is capable. Fortunately, the sensitivity of
INL and DNL to op amp offset has been greatly reduced
compared to previous generations of multiplying DACs.
Op amp offset will contribute mostly to output offset and
gain and will have minimal effect on INL and DNL. For
example, a 500V op amp offset will cause about 0.55LSB
INL degradation and 0.15LSB DNL degradation with a 10V
full-scale range. The main effects of op amp offset will
be a degradation of zero-scale error equal to the op amp
offset, and a degradation of full-scale error equal to twice
the op amp offset. For example, the same 500V op amp
offset will cause a 3.3LSB zero-scale error and a 6.5LSB
full-scale error with a 10V full-scale range.
Op amp input bias current (IBIAS) contributes only a zero-
scale error equal to IBIAS(RFB) = IBIAS(RREF) = IBIAS(7k).
Table 2 shows a selection of LTC op amps which are
suitable for use with the LTC1595/LTC1596. For a thor-
ough discussion of 16-bit DAC settling time and op amp
selection, refer to Application Note 74, 鈥淐omponent and
MeasurementAdvancesEnsure16-BitDACSettlingTime.鈥�
Grounding
As with any high resolution converter, clean grounding
is important. A low impedance analog ground plane and
star grounding should be used. IOUT2 (LTC1596) and GND
(LTC1595) must be tied to the star ground with as low a
resistance as possible.
Table 2. 16-Bit Settling Time for Various Amplifiers Driven by the LT1595 DAC. LT1468 (Shaded) Offers Fastest Settling Time While
Maintaining Accuracy Over Temperature
AMPLIFIER
CONSERVATIVE SETTLING TIME AND COMPENSATION VALUE
COMMENTS
LT1001
120s
100pF
Good Low Speed Choice
LT1007
19s
100pF
IB Gives 鈮�1LSB Error at 25掳C
LT1013
75s
150pF
鈮�1LSB Error Due to VOS Over Temperature
LT1077
200s
100pF
LT1097
120s
75pF
Good Low Speed Choice
LT1112
120s
100pF
Good Low Speed Choice Dual
LT1178
450s
100pF
Low Power Dual
LT1468
2.5s
30pF
Fastest Settling with 16-Bit Performance
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| LTC6405IUD#TRPBF | IC DIFF AMP/DRIVER R-R 16-QFN |
| VI-2TW-MW-B1 | CONVERTER MOD DC/DC 5.5V 100W |
| AD8138ARZ-R7 | IC AMP DIFF LDIST LP 95MA 8SOIC |
| ADA4938-1ACPZ-RL | IC ADC DRIVER DIFF 16-LFCSP |
| VI-2TV-MW-B1 | CONVERTER MOD DC/DC 5.8V 100W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| LTC1596-1CCN#PBF | 鍔熻兘鎻忚堪:IC D/A CONV 16BIT MLTPLYNG 16DIP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:2,400 绯诲垪:- 瑷�(sh猫)缃檪闁�:- 浣嶆暩(sh霉):18 鏁�(sh霉)鎿�(j霉)鎺ュ彛:涓茶 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:3 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 鍔熺巼鑰楁暎锛堟渶澶э級:- 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:36-TFBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:36-TFBGA 鍖呰:甯跺嵎 (TR) 杓稿嚭鏁�(sh霉)鐩拰椤炲瀷:* 閲囨ǎ鐜囷紙姣忕锛�:* |
| LTC1596-1CCSW | 鍔熻兘鎻忚堪:IC D/A CONV 16BIT MLTPLYNG16SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Data Converter Fundamentals DAC Architectures 妯�(bi膩o)婧�(zh菙n)鍖呰:750 绯诲垪:- 瑷�(sh猫)缃檪闁�:7µs 浣嶆暩(sh霉):16 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 闆诲闆绘簮:闆� ± 鍔熺巼鑰楁暎锛堟渶澶э級:100mW 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:28-LCC锛圝 褰㈠紩绶氾級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-PLCC锛�11.51x11.51锛� 鍖呰:甯跺嵎 (TR) 杓稿嚭鏁�(sh霉)鐩拰椤炲瀷:1 闆诲锛屽柈妤碉紱1 闆诲锛岄洐妤� 閲囨ǎ鐜囷紙姣忕锛�:143k |
| LTC1596-1CCSW#PBF | 鍔熻兘鎻忚堪:IC D/A CONV 16BIT MLTPLYNG16SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Data Converter Fundamentals DAC Architectures 妯�(bi膩o)婧�(zh菙n)鍖呰:750 绯诲垪:- 瑷�(sh猫)缃檪闁�:7µs 浣嶆暩(sh霉):16 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 闆诲闆绘簮:闆� ± 鍔熺巼鑰楁暎锛堟渶澶э級:100mW 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:28-LCC锛圝 褰㈠紩绶氾級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-PLCC锛�11.51x11.51锛� 鍖呰:甯跺嵎 (TR) 杓稿嚭鏁�(sh霉)鐩拰椤炲瀷:1 闆诲锛屽柈妤�锛�1 闆诲锛岄洐妤� 閲囨ǎ鐜囷紙姣忕锛�:143k |
| LTC1596-1CCSW#TR | 鍔熻兘鎻忚堪:IC DAC 16BIT MULTIPLY SER 16SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Data Converter Fundamentals DAC Architectures 妯�(bi膩o)婧�(zh菙n)鍖呰:750 绯诲垪:- 瑷�(sh猫)缃檪闁�:7µs 浣嶆暩(sh霉):16 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 闆诲闆绘簮:闆� ± 鍔熺巼鑰楁暎锛堟渶澶э級:100mW 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:28-LCC锛圝 褰㈠紩绶氾級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-PLCC锛�11.51x11.51锛� 鍖呰:甯跺嵎 (TR) 杓稿嚭鏁�(sh霉)鐩拰椤炲瀷:1 闆诲锛屽柈妤碉紱1 闆诲锛岄洐妤� 閲囨ǎ鐜囷紙姣忕锛�:143k |
| LTC1596-1CCSW#TRPBF | 鍔熻兘鎻忚堪:IC D/A CONV 16BIT MLTPLYNG16SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Data Converter Fundamentals DAC Architectures 妯�(bi膩o)婧�(zh菙n)鍖呰:750 绯诲垪:- 瑷�(sh猫)缃檪闁�:7µs 浣嶆暩(sh霉):16 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 闆诲闆绘簮:闆� ± 鍔熺巼鑰楁暎锛堟渶澶э級:100mW 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:28-LCC锛圝 褰㈠紩绶氾級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-PLCC锛�11.51x11.51锛� 鍖呰:甯跺嵎 (TR) 杓稿嚭鏁�(sh霉)鐩拰椤炲瀷:1 闆诲锛屽柈妤碉紱1 闆诲锛岄洐妤� 閲囨ǎ鐜囷紙姣忕锛�:143k |
鐧�(f膩)甯冪穵鎬ラ噰璩硷紝3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�
