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參數(shù)資料
型號(hào): LTC1595ACN8#PBF
廠商: Linear Technology
文件頁數(shù): 3/16頁
文件大?。?/td> 0K
描述: IC D/A CONV 16BIT MULTPLYNG 8DIP
標(biāo)準(zhǔn)包裝: 50
設(shè)置時(shí)間: 1µs
位數(shù): 16
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 55µW
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
輸出數(shù)目和類型: 1 電流,單極;1 電流,雙極
采樣率(每秒): *
LTC1595/LTC1596/LTC1596-1
11
159561fb
applicaTions inForMaTion
Bipolar (4-Quadrant Multiplying) Mode
(VOUT = –VREF to VREF)
The LTC1595/LTC1596 can be used with a dual op amp
and three external resistors to provide 4-quadrant multi-
plying operation as shown in Figure 2 (last page). With a
fixed 10V reference, the circuits shown give a precision
bipolar –10V to 10V output swing. Using the LTC1596-1
will cause the power-on reset and clear pin to reset the
DAC to mid-scale (bipolar zero).
Op Amp Selection
Because of the extremely high accuracy of the 16-bit
LTC1595/LTC1596, thought should be given to op amp
selection in order to achieve the exceptional performance
of which the part is capable. Fortunately, the sensitivity of
INL and DNL to op amp offset has been greatly reduced
compared to previous generations of multiplying DACs.
Op amp offset will contribute mostly to output offset and
gain and will have minimal effect on INL and DNL. For
example, a 500V op amp offset will cause about 0.55LSB
INL degradation and 0.15LSB DNL degradation with a 10V
full-scale range. The main effects of op amp offset will
be a degradation of zero-scale error equal to the op amp
offset, and a degradation of full-scale error equal to twice
the op amp offset. For example, the same 500V op amp
offset will cause a 3.3LSB zero-scale error and a 6.5LSB
full-scale error with a 10V full-scale range.
Op amp input bias current (IBIAS) contributes only a zero-
scale error equal to IBIAS(RFB) = IBIAS(RREF) = IBIAS(7k).
Table 2 shows a selection of LTC op amps which are
suitable for use with the LTC1595/LTC1596. For a thor-
ough discussion of 16-bit DAC settling time and op amp
selection, refer to Application Note 74, “Component and
MeasurementAdvancesEnsure16-BitDACSettlingTime.”
Grounding
As with any high resolution converter, clean grounding
is important. A low impedance analog ground plane and
star grounding should be used. IOUT2 (LTC1596) and GND
(LTC1595) must be tied to the star ground with as low a
resistance as possible.
Table 2. 16-Bit Settling Time for Various Amplifiers Driven by the LT1595 DAC. LT1468 (Shaded) Offers Fastest Settling Time While
Maintaining Accuracy Over Temperature
AMPLIFIER
CONSERVATIVE SETTLING TIME AND COMPENSATION VALUE
COMMENTS
LT1001
120s
100pF
Good Low Speed Choice
LT1007
19s
100pF
IB Gives ≈1LSB Error at 25°C
LT1013
75s
150pF
≈1LSB Error Due to VOS Over Temperature
LT1077
200s
100pF
LT1097
120s
75pF
Good Low Speed Choice
LT1112
120s
100pF
Good Low Speed Choice Dual
LT1178
450s
100pF
Low Power Dual
LT1468
2.5s
30pF
Fastest Settling with 16-Bit Performance
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LTC1595ACS8PBF 制造商:Linear Technology 功能描述:DAC Serial 16-Bit Multiplying SOIC8