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參數資料
| 型號： | LTC1595 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Serial 16-Bit Multiplying DACs(電流輸出,串行乘法數模轉換器) |
| 中文描述： | 串行16位乘法數模轉換器（電流輸出，串行乘法數模轉換器） |
| 文件頁數： | 9/12頁 |
| 文件大?。?/td> | 256K |
| 代理商： | LTC1595 |
9
LTC1595/LTC1596/LTC1596-1
Description
The LTC1595/LTC1596 are 16-bit multiplying DACs which
have serial inputs and current outputs. They use precision
R/2R technology to provide exceptional linearity and
stability. The devices operate from a single 5V supply and
provide
±
10V reference input and voltage output ranges
when used with an external op amp. These devices have
a proprietary deglitcher that reduces glitch impulse to
1nV-s over a 0V to 10V output range.
Serial I/O
The LTC1595/LTC1596 have SPI/MICROWIRE compat-
ible serial ports that accept 16-bit serial words. Data is
accepted MSB first and loaded with a load pin.
The 8-pin LTC1595 has a 3-wire interface. Data is shifted
into the SRI data input on the rising edge of the CLK pin.
At the end of the data transfer, data is loaded into the DAC
register by pulling the LD pin low (see LTC1595 Timing
Diagram).
APPLICATIO
S I
FOR
ATIO
U
W
U
U
The 16-pin LTC1596 can operate in identical fashion to the
LTC1595 but offers additional pins for flexibility. Four
clock pins are available STB1, STB2, STB3 and STB4.
STB1, STB2 and STB4 operate like the CLK pin of the
LTC1595, capturing data on their rising edges. STB3
captures data on its falling edge (see Truth Table 1).
The LTC1596 has two load pins, LD1 and LD2. To load
data, both pins must be taken low. If one of the pins is
grounded, the other pin will operate identically to LTC1595’s
LD pin. An asynchronous clear input (CLR) resets the
LTC1596 to zero scale (and the LTC1596-1 to midscale)
when pulled low (see Truth Table 2).
The LTC1596 also has a data output pin SRO that can be
connected to the SRI input of another DAC to daisy-chain
multiple DACs on one 3-wire interface (see LTC1596
Timing Diagram).
Unipolar (2-Quadrant Multiplying) Mode
(V
OUT
= 0V to –V
REF
)
The LTC1595/LTC1596 can be used with a single op amp
to provide 2-quadrant multiplying operation as shown in
Figure 1. With a fixed –10V reference, the circuits shown
give a precision unipolar 0V to 10V output swing.
Figure 1. Unipolar Operation (2-Quadrant Multiplication) V
OUT
= 0V to –V
REF
Table 1. Unipolar Binary Code Table
DIGITAL INPUT
BINARY NUMBER
IN DAC REGISTER
LSB
1111 11111111
0000 00000000
0000 00000001
0000 00000000
0000
–V
REF
(65,535/65,536)
–V
REF
(32,768/65,536) = –V
REF
/2
–V
REF
(1/65,536)
0V
ANALOG OUTPUT
V
OUT
MSB
1111
1000
0000
(b)
V
DD
CLK
SRI
LD
V
REF
LTC1595
R
FB
GND
4
7
6
5
8
5V
V
–10V TO 10V
1
2
3
OUT1
33pF
V
0V TO –V
REF
1595/96 F01b
–
+
LT1001
μ
P
0.1
μ
F
(a)
V
DD
V
REF
LTC1596
R
FB
AGND
DGND
3
12
10
4
7
5
6
9
8
11
2
14
13
5V
V
REF
–10V TO 10V
TO NEXT DAC
FOR DAISY-CHAINING
15
16
1
OUT1
33pF
0.1
μ
F
V
OUT
0V TO –V
REF
1595/96 F01a
OUT2
–
+
LT1001
CLR
STB3
STB1
SRI
LD1
SRO
LD2
STB2
STB4
μ
P
相關PDF資料 |
PDF描述 |
|---|---|
| LTC1596 | Serial 16-Bit Multiplying DACs(電流輸出,串行乘法數模轉換器) |
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| LTC1597BCG | 14-Bit and 16-Bit Parallel Low Glitch Multiplying DACs with 4-Quadrant Resistors |
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