APPLICATIONS INFOR
參數(shù)資料
型號(hào): LTC1562IG-2#TR
廠商: Linear Technology
文件頁數(shù): 3/16頁
文件大?。?/td> 0K
描述: IC FILTER UNIV RC QUAD LN 20SSOP
標(biāo)準(zhǔn)包裝: 1,800
濾波器類型: 通用連續(xù)計(jì)時(shí)
頻率 - 截止或中心: 300kHz
濾波器數(shù): 4
濾波器階數(shù): 8th
電源電壓: 4.75 V ~ 10.5 V,±4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 20-SSOP
包裝: 帶卷 (TR)
11
LTC1562-2
15622fa
APPLICATIONS INFORMATION
WU
U
external component ZIN, usually a resistor or capacitor.
This component must of course be rated to sustain the
magnitude of voltage imposed on it.
Lowpass “T” Input Circuit
The virtual ground INV input in the Operational Filter
block provides a means for adding an “extra” lowpass
pole to any resistor-input application (such as the basic
lowpass, Figure 5, or bandpass, Figure 6a). The resistor
that would otherwise form ZIN is split into two parts and
a capacitor to ground added, forming an R-C-R “T”
network (Figure 9). This adds an extra, independent real
pole at a frequency:
f
RC
P
PT
=
π
1
2
where CT is the new external capacitor and RP is the
parallel combination of the two input resistors RINA and
RINB. This pair of resistors must normally have a pre-
scribed series total value RIN to set the filter’s gain as
described above. The parallel value RP can however be set
arbitrarily (to RIN/4 or less) which allows choosing a
convenient standard capacitor value for CT and fine tuning
the new pole with RP.
INV
V1
2nd ORDER
1/4 LTC1562-2
V2
1562-2 F10
R2
RQ
CINB
RT
VIN
CINA
Figure 10. Highpass “T” Input Circuit
A practical limitation of this technique is that the CT capaci-
tor values that tend to be required (hundreds or thousands
of pF) can destabilize the op amp in Figure 3 if RINB is too
small, leading to AC errors such as Q enhancement. For this
reason, when RINA and RINB are unequal, preferably the
larger of the two should be placed in the RINB position.
Highpass “T” Input Circuit
A method similar to the preceding technique adds an
“extra” highpass pole to any capacitor-input application
(such as the bandpass of Figure 6b or the highpass of
Figure 7). This method splits the input capacitance CIN into
two series parts CINA and CINB, with a resistor RT to ground
between them (Figure 10). This adds an extra 1st order
highpass corner with a zero at DC and a pole at the
frequency:
f
RC
P
TP
=
π
1
2
where CP = CINA + CINB is the parallel combination of the
two capacitors. At the same time, the total series capaci-
tance CIN will control the filter’s gain parameter (HH in
Basic Highpass). For a given series value CIN, the parallel
value CP can still be set arbitrarily (to 4CIN or greater).
INV
V1
2nd ORDER
1/4 LTC1562-2
V2
1562-2 F09
R2
RQ
RINB
RINA
CT
VIN
Figure 9. Lowpass “T” Input Circuit
The procedure therefore is to begin with the target extra
pole frequency fP. Determine the series value RIN from the
gain requirement. Select a capacitor value CT such that RP
= 1/(2
πfPCT) is no greater than RIN/4, and then choose
RINA and RINB that will simultaneously have the parallel
value RP and the series value RIN. Such RINA and RINB can
be found directly from the expression:
1
2
1
2
4
2
RR
R R
IN
IN P
±
()
The procedure then is to begin with the target corner (pole)
frequency fP. Determine the series value CIN from the gain
requirement (for example, CIN = HH(100pF) for a high-
pass). Select a resistor value RT such that CP = 1/(2πRTfP)
is at least 4CIN, and select CINA and CINB that will simulta-
neously have the parallel value CP and the series value CIN.
Such CINA and CINB can be found directly from the
expression:
1
2
1
2
4
2
CC
C C
P
IN P
±
()
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