參數(shù)資料
型號: LTC1550CS8-4.1
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: Low Noise, Switched Capacitor Regulated Voltage Inverters
中文描述: SWITCHED CAPACITOR REGULATOR, 900 kHz SWITCHING FREQ-MAX, PDSO8
封裝: 0.150 INCH, PLASTIC, SOP-8
文件頁數(shù): 5/12頁
文件大?。?/td> 319K
代理商: LTC1550CS8-4.1
5
LTC1550/LTC1551
TYPICAL PERFOR
M
A
CE CHARACTERISTICS
U
Spot Noise
(See Figure 2, C
OUT
= 10
μ
F)
10
V
CC
= 5V
I
L
= 5mA
C
IN
= 4.7
μ
F
C
OUT
= 10
μ
F
C
L
μ
F
FREQUENCY (kHz)
1
0.01
N
μ
V
H
1
0.1
10
100
LTC1550/51 G12
Output Spectrum
(See Figure 2, C
OUT
= 22
μ
F)
FREQUENCY (Hz)
100k
N
μ
V
90
80
70
60
50
40
30
20
10
0
–10
1M
10M
LT1550/51 G13
V
CC
= 5V
I
L
= 5mA
C
IN
4.7
μ
F
C
OUT
= 22
μ
F
C
L
= 0.1
μ
F
Spot Noise
(See Figure 2, C
OUT
= 22
μ
F)
FREQUENCY (kHz)
1
0.01
N
μ
V
H
1
0.1
10
10
100
LTC1550/51 G14
V
CC
= 5V
I
L
= 5mA
C
IN
= 4.7
μ
F
C
OUT
= 22
μ
F
C
L
μ
F
PI
FU
CTIO
N
S
U
U
SHDN:
Shutdown (TTL Compatible). This pin is active low
(SHDN) for the LTC1550 and active high (SHDN) for the
LTC1551. When this pin is at V
CC
(GND for LTC1551), the
LTC1550 operates normally. When SHDN is pulled low
(high for LTC1551), the LTC1550 enters shutdown mode.
In shutdown, the charge pump stops, the output collapses
to 0V, and the quiescent current drops typically to 0.2
μ
A.
V
CC
:
Power Supply. V
CC
requires an input voltage between
4.5V and 6.5V for the fixed voltage LTC1550CS8-4.1/
LTC1551CS8-4.1. The adjustable voltage LTC1550CGN/
LTC1550IGN operates with a VCC range of 2.7V to 6.5V.
Output voltage and output load current conditions depend
on the VCC supply voltage. Consult the Electrical Charac-
teristics table and Typical Performance Characteristics for
guaranteed test points. The difference between the input
voltage and output should never be set to exceed 14V or
damage to the chip may occur. V
CC
must be bypassed to
PGND (GND for 8-pin packages) with at least a 0.1
μ
F
capacitor placed in close proximity to the chip. A 4.7
μ
F or
larger bypass capacitor is recommended to minimize
noise and ripple at the output.
C1
+
:
C1 Positive Input. Connect a 0.1
μ
F capacitor between
C1
+
and C1
.
V
OUT
:
Negative Voltage Output. This pin must be bypassed
to ground with a 4.7
μ
F or larger capacitor to ensure
regulator loop stability. At least 10
μ
F is recommended to
provide specified output ripple. An additional 0.1
μ
F low
ESR capacitor is recommended to minimize high fre-
quency spikes at the output.
C1
:
C1 Negative Input. Connect a 0.1
μ
F capacitor from
C1
+
to C1
.
GND:
Ground. Connect to a low impedance ground. A
ground plane will help minimize regulation errors.
CP
OUT
:
Negative Charge Pump Output. This pin requires a
0.1
μ
F storage capacitor to ground.
SENSE:
Connect to V
OUT
. The LTC1550/LTC1551 internal
regulator uses this pin to sense the output voltage. For
optimum regulation, SENSE should be connected close to
the output load.
SSOP PACKAGE ONLY
PGND:
Power Ground. Connect to a low impedance ground.
PGND should be connected to the same potential as
AGND.
AGND:
Analog Ground. Connect to a low impedance
ground. AGND should be connected to a ground plane to
minimize regulation errors.
相關(guān)PDF資料
PDF描述
LTC1551CS8-4.1 Low Noise, Switched Capacitor Regulated Voltage Inverters
LTC1550LIGN Low Noise, Switched Capacitor Regulated Voltage Inverters
LTC1550LCMS8-4.1 Low Noise, Switched Capacitor Regulated Voltage Inverters
LTC1551LCMS8-4.1 Low Noise, Switched Capacitor Regulated Voltage Inverters
LTC1550LCS8-4.1 Low Noise, Switched Capacitor Regulated Voltage Inverters
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