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參數(shù)資料
| 型號(hào)： | LTC1545 |
| 廠(chǎng)商： | Linear Technology Corporation |
| 英文描述： | Software-Selectable Multiprotocol Transceiver(軟件-可選擇多協(xié)議5發(fā)5收收發(fā)器) |
| 中文描述： | 軟件選擇多協(xié)議收發(fā)器（軟件-可選擇多協(xié)議5發(fā)5收收發(fā)器） |
| 文件頁(yè)數(shù)： | 7/16頁(yè) |
| 文件大小： | 248K |
| 代理商： | LTC1545 |
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7
LTC1545
SWITCHIU
W
W
Figure 6. V.11 Receiver Propagation Delays
APPLICATIO
S I
FOR
ATIO
U
Overview
The LTC1543/LTC1545 form the core of a complete soft-
ware-selectable DTE or DCE interface port that supports
the RS232, RS449, EIA530, EIA530-A, V.35, V.36 or X.21
protocols. Cable termination may be implemented using
the LTC1344A software-selectable cable termination chip
or by using existing discrete designs.
A complete DCE-to-DTE interface operating in EIA530
mode is shown in Figure 9. The LTC1543 of each port is
used to generate the clock and data signals. The LTC1545
is used to generate the control signals along with LL (Local
Loop-Back), RL (Remote Loop-Back), TM (Test Mode)
and RI (Ring Indicate). The LTC1344A cable termination
chip is used only for the clock and data signals because
they must support V.35 cable termination. The control
signals do not need any external resistors.
W
U
U
Mode Selection
The interface protocol is selected using the mode select
pins M0, M1 and M2 (see the Mode Selection table).
For example, if the port is configured as a V.35 interface,
the mode selection pins should be M2 = 1, M1 = 0, M0 = 0.
For the control signals, the drivers and receivers will
operate in V.28 (RS232) electrical mode. For the clock and
data signals, the drivers and receivers will operate in V.35
electrical mode. The DCE/DTE pin will configure the port
for DCE mode when high, and DTE when low.
The interface protocol may be selected simply by plugging
the appropriate interface cable into the connector. The
mode pins are routed to the connector and are left uncon-
nected (1) or wired to ground (0) in the cable as shown in
Figure 10.
V
IH
V
IL
1.5V
1.5V
1.5V
1.5V
t
PHL
V
OH
R
V
OL
A
t
PLH
1545 F08
Figure 8. V.10, V.28 Receiver Propagation Delays
3V
0V
1.5V
0V
–3V
3V
1.5V
0V
3V
–3V
t
PHL
t
f
V
O
–V
O
D
A
t
PLH
t
r
1545 F07
Figure 7. V.10, V.28 Driver Propagation Delays
V
OD2
–V
OD2
0V
1.5V
0V
1.5V
t
PLH
V
OH
R
V
OL
B – A
t
PHL
1545 F06
f = 1MHz : t
r
≤
10ns : t
f
≤
10ns
INPUT
OUTPUT
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