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參數(shù)資料
| 型號： | LTC1530C |
| 廠商： | Linear Technology Corporation |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Isolated Flyback Switching Regulator with 9V Output |
| 中文描述： | 隔離反激式開關(guān)穩(wěn)壓9V輸出 |
| 文件頁數(shù)： | 9/24頁 |
| 文件大小： | 288K |
| 代理商： | LTC1530C |
9
LTC1530
Typically, thermal shutdown is activated if the LTC1530’s
junction temperature exceeds 150
°
C. G1 and G2 resume
switching when the junction temperature drops below
100
°
C.
Soft-Start and Current Limit
Unlike other PWM parts, the LTC1530 includes an on-chip
soft-start capacitor that is used during start-up and cur-
rent limit operation. On power-up, an internal 4
μ
A pull-up
at COMP brings the LTC1530 out of shutdown mode. An
internal current source then charges the internal C
SS
capacitor. The COMP pin is clamped to one V
GS
above the
voltage on C
SS
during start-up. This prevents the error
amplifier from forcing the loop to maximum duty cycle.
The LTC1530 operates at low duty cycle as the COMP pin
voltage increases above about 2.4V. The slew rate of the
soft-start capacitor is typically 0.4V/ms. As the voltage on
C
SS
continues to increase, M
SS
eventually turns off and the
error amplifier regulates the output. The MIN comparator
is disabled if soft-start is active to prevent an override of
the soft-start function.
The LTC1530 includes another feedback loop to control
operation in current limit. Before each falling edge of G1,
the current comparator, CC, samples and holds the volt-
age drop across external MOSFET Q1 with the LTC1530’s
I
FB
pin. CC compares the voltage at I
FB
to the voltage at the
I
MAX
pin. As peak current rises, the voltage across the
R
DS(ON)
of Q1 increases. If the voltage at I
FB
drops below
I
MAX
, indicating that Q1’s drain current has exceeded the
maximum desired level, CC pulls current out of C
SS
. Duty
cycle decreases and the output current is controlled. The
CC comparator pulls current out of C
SS
in proportion to the
voltage difference between I
FB
and I
MAX
. Under minor
overload conditions, the voltage at C
SS
falls gradually,
creating a time delay before current limit activates. Very
short, mild overloads may not affect the output voltage at
all. Significant overload conditions allow the voltage on
C
SS
to reach a steady state and the output remains at a
reduced voltage until the overload is removed. Serious
overloads generate a large overdrive and allow CC to pull
the C
SS
voltage down quickly, thus preventing damage to
the external components.
By using the R
DS(ON)
of Q1 to measure output current, the
current limit circuit eliminates the sense resistor that
would otherwise be required. This minimizes the number
of components in the high current power path. The current
limit circuitry is not designed to be highly accurate. It is
primarily meant to prevent damage to the power supply
circuitry during fault conditions. The exact current level
where current limiting takes effect will vary from unit to
unit as the R
DS(ON)
of Q1 varies.
Figure 5a illustrates the basic connections for the current
limit circuitry. For a given current limit level, the external
resistor from I
MAX
to V
IN
is determined by:
)
LTC1530
+
+
C
IN
C
OUT
V
OUT
1530 F05
V
IN
L
O
20
I
FB
G1
Q1
Q2
G2
I
MAX
R
IMAX
200
μ
A
+
–
CC
Maximum load current
Inductor ripple current
V
V
OUT
OUT
)( )( )
1530
I
=
V
f
oscillator frequency = 300kHz
value
n-r
tance of Q1 at I
200 A sink current
L
R
I
IMAX
RIPPLE
IN
(
=
=
OSC
LTC
Inductor
O
DS(ON)Q1
=
LMAX
R
I
R
I
where
I
I
I
I
L
V
f
O
esis
IMAX
LMAX
DS ON Q
IMAX
LMAX
LOAD
RIPPLE
2
LOAD
O
IN
OSC
=
(
=
+
=
=
)(
)
=
,
1
Figure 5a. Current Limit Setting (Use Kelvin-Sense
Connections Directly at the Drain and Source of Q1)
APPLICATIOU
W
U
U
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