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參數(shù)資料
| 型號(hào)： | LTC1504CS8-3.3 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Quadruple 2-Input Exclusive-OR Gates 14-SOIC 0 to 70 |
| 中文描述： | 1 A SWITCHING REGULATOR, 250 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | 0.150 INCH, PLASTIC, SO-8 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大小： | 249K |
| 代理商： | LTC1504CS8-3.3 |
10
LTC1504
APPLICATIO
S I
FOR
ATIO
U
Q1 exceeds the drop across the I
MAX
resistor, I
LIM
pulls
current out of the external soft start capacitor, reducing the
voltage at SS. A soft start capacitor should always be used
if current limit is enabled. SS, in turn, pulls down on COMP,
limiting the output duty cycle and controlling the output
current. When the current overload is removed, the I
LIM
amplifier lets go of SS and allows it to rise again as if it were
completing a soft start cycle. The size of the external soft
start capacitor controls both how fast the current limit
responds once an overload is detected and how fast the
output recovers once the overload is removed. The soft
start capacitor also compensates the feedback loop cre-
ated by the I
LIM
amplifier. Because the I
LIM
loop is a current
feedback loop, the additional phase shift due to the output
inductor and capacitor do not come into play and the loop
can be adequately compensated with a single capacitor.
Usually a 0.1
μ
F ceramic capacitor from SS to GND pro-
vides adequate soft start behavior and acceptable current
limit response.
This type of current limit circuit works well with mild
current overloads and eliminates the need for an external
current sensing resistor, making it attractive for LTC1504
applications. These same features also handicap the cur-
rent limit circuit under severe short circuits when the
output voltage is very close to ground. Under this condi-
tion, the LTC1504 must run at extremely narrow duty
cycles (<5%) to keep the current under control. When the
on-time falls below the time required to sense the current
in Q1, the LTC1504 responds by reducing the oscillator
frequency, increasing the off-time to decrease the duty
cycle and allow it to maintain some control of the output
current. The oscillator frequency may drop by as much as
a factor of 10 under severe current overloads.
Under extreme short circuits (e.g., screwdriver to ground)
the on-time will reduce to the point where the LTC1504 will
lose control of the output current. At this point, output
current will rise until the inductor saturates, and the
current will be limited by the parasitic ESL of the inductor
and the R
ON
of Q2 inside the LTC1504. This current is
usually nondestructive and dissipates a limited amount of
power since the output voltage is very low. A typical
LTC1504 circuit can withstand such a short for many
seconds without damage. The test circuit in Figure 1 will
W
U
U
typically withstand a direct output short for more than 30
seconds without damage to the LTC1504. Eventually,
however, a continuous short may cause the die tempera-
ture to rise to destructive levels.
Note that the current limit is primarily designed to protect
the LTC1504 from damage and is not intended to be used
to generate an accurate constant-current output. As the
die temperature varies in a current limited condition, the
R
ON
of the internal switches will change and the current
limit threshold will move around. R
ON
will also vary from
part-to-part due to manufacturing tolerance. The external
I
MAX
resistor should be chosen to allow enough room to
account for these variations without allowing the current
limit to engage at the maximum expected load current. A
current limit setting roughly double the expected load is
often a good compromise, eliminating unintended current
limit operation while preventing circuit destruction under
actual fault conditions. If desired, current limit can be
disabled by floating the I
MAX
pin; the internal current source
will pull I
MAX
to GND and the I
LIM
amplifier will be disabled.
Shutdown
The LTC1504 includes a micropower shutdown mode
controlled by the logic level at SHDN. A logic High at SHDN
allows the part to operate normally. A logic Low at SHDN
stops all internal switching, pulls COMP, SS and SW to
GND and drops quiescent current below 1
μ
A typically.
Note that the internal N-channel power MOSFET from SW
to GND turns on when SHDN is asserted. This ensures that
the output voltage drops to zero when the LTC1504 is shut
down, but prevents other devices from powering the
output when the LTC1504 is disabled.
External Clock Synchronization
The LTC1504 SHDN pin can double as an external clock
input for applications that require a synchronized clock or
a faster switching speed. The SHDN pin terminates the
internal sawtooth wave and resets the oscillator immedi-
ately when it goes low, but waits 50
μ
s before shutting
down the rest of the internal circuitry. A clock signal
applied directly to the SHDN pin will force the LTC1504
internal oscillator to lock to its frequency as long as the
external clock runs faster than the internal oscillator
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