The q denotes specifications which apply o" />
參數(shù)資料
型號(hào): LTC1451IS8#PBF
廠商: Linear Technology
文件頁(yè)數(shù): 7/12頁(yè)
文件大?。?/td> 0K
描述: IC D/A CONV 12BIT R-R 8-SOIC
標(biāo)準(zhǔn)包裝: 100
設(shè)置時(shí)間: 14µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 2mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): *
產(chǎn)品目錄頁(yè)面: 1350 (CN2011-ZH PDF)
4
LTC1451
LTC1452/LTC1453
sn145123 145123fas
The q denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (LTC1451LTC1452), VCC = 3V (LTC1453).
LOAD CURRENT (mA)
0.0001
MINIMUM
SUPPLY
VOLTAGE
(V)
110
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
1451/2/3 G01
0.01
0.001
0.1
100
VOUT < 1LSB
TEMPERATURE (
°C)
–55
SUPPLY
CURRENT
(
A)
–25
5
35
65
1451/2/3 G03
95
450
440
430
420
410
400
390
380
370
360
350
125
VCC = 5.5V
VCC = 4.5V
VCC = 5V
LOAD CURRENT (mA)
0.0001
MINIMUM
SUPPLY
VOLTAGE
(V)
110
4.50
4.25
4.00
3.75
3.50
3.25
3.00
2.75
2.50
2.25
1451/2/3 G02
0.01
0.001
0.1
100
VOUT < 1LSB
LTC1451
Supply Current vs Temperature
LTC1451 Minimum Supply
Voltage vs Load Current
LTC1453 Minimum Supply
Voltage vs Load Current
Note 3: Load is 5k
in parallel with 100pF.
Note 4: DAC switched between all 1s and the code corresponding to VOS
for the part, i.e., LTC1451: code 18; LTC1453: code 30.
Note 5: Digital inputs at 0V or VCC.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Nonlinearity is defined from the first code that is greater than or
equal to the maximum offset specification to code 4095 (full scale).
LTC1451/LTC1452
LTC1453
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Digital I/O
VIH
Digital Input High Voltage
q
2.4
2.0
V
VIL
Digital Input Low Voltage
q
0.8
0.6
V
VOH
Digital Output High Voltage
IOUT = – 1mA
q
VCC – 1.0
VCC – 0.7
V
VOL
Digital Output Low Voltage
IOUT = 1mA
q
0.4
V
ILEAK
Digital Input Leakage
VIN = GND to VCC
q
±10
A
CIN
Digital Input Capacitance
Guaranteed by Design
q
10
pF
Not Subject to Test
Switching
t1
DIN Valid to CLK Setup
q
40
60
ns
t2
DIN Valid to CLK Hold
q
00
ns
t3
CLK High Time
q
40
60
ns
t4
CLK Low Time
q
40
60
ns
t5
CS/LD Pulse Width
q
50
80
ns
t6
LSB CLK to CS/LD
q
40
60
ns
t7
CS/LD Low to CLK
q
20
30
ns
t8
DOUT Output Delay
CLOAD = 15pF
q
150
220
ns
t9
CLK Low to CS/LD Low
q
20
30
ns
ELECTRICAL CHARACTERISTICS
TYPICAL PERFOR A CE CHARACTERISTICS
UW
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