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參數(shù)資料
| 型號： | LTC1419AIG |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 14-Bit, 800ksps Sampling A/D Converter with Shutdown |
| 中文描述： | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | 0.209 INCH, PLASTIC, SSOP-28 |
| 文件頁數(shù)： | 12/20頁 |
| 文件大?。?/td> | 401K |
| 代理商： | LTC1419AIG |
12
LTC1419
APPLICATIO
S I
FOR
ATIO
U
Differential Inputs
The LTC1419 has a unique differential sample-and-hold
circuit that allows rail-to-rail inputs. The ADC will always
convert the difference of +A
IN
– (–A
IN
) independent of the
common mode voltage (see Figure 11a). The common
mode rejection holds up to extremely high frequencies,
see Figure 10a. The only requirement is that both inputs
can not exceed the AV
DD
or AV
SS
power supply voltages.
Integral nonlinearity errors (INL) and differential
nonlinearity errors (DNL) are independent of the common
mode voltage, however, the bipolar zero error (BZE) will
vary. The change in BZE is typically less than 0.1% of the
common mode voltage. Dynamic performance is also
affected by the common mode voltage. THD will degrade
as the inputs approach either power supply rail, from 86dB
with a common mode of 0V to 76dB with a common mode
of 2.5V or –2.5V.
W
U
U
Figure 10b. Selectable 0V to 5V or
±
2.5V Input Range
Differential inputs allow greater flexibility for accepting
different input ranges. Figure 10b shows a circuit that
converts a 0V to 5V analog input signal with only an
additional buffer that is not in the signal path.
Full-Scale and Offset Adjustment
Figure 11a shows the ideal input/output characteristics
for the LTC1419. The code transitions occur midway
between successive integer LSB values (i.e., –FS +
0.5LSB, –FS + 1.5LSB, –FS + 2.5LSB,... FS – 1.5LSB,
FS –
0.5LSB). The output is two’s complement binary with
1LSB = FS – (–FS)/16384 = 5V/16384 = 305.2
μ
V.
In applications where absolute accuracy is important,
offset and full-scale errors can be adjusted to zero. Offset
error must be adjusted before full-scale error. Figure 11b
shows the extra components required for full-scale error
adjustment. Zero offset is achieved by adjusting the offset
ANALOG
INPUT
1419 F11b
1
2
3
R4
100
R7
50k
R3
24k
5V
R6
24k
R8
50k
R5
47k
4
5
0.1
μ
F
10
μ
F
+A
IN
–A
IN
V
REF
REFCOMP
AGND
LTC1419
+
Figure 11b. Offset and Full-Scale Adjust Circuit
Figure 10a. CMRR vs Input Frequency
Figure 11a. LTC1419 Transfer Characteristics
1419 F11a
011...111
011...110
000...001
000...000
111...111
111...110
100...001
100...000
FS – 1LSB
–(FS – 1LSB)
INPUT VOLTAGE [+A
IN
– (–A
IN
)]
O
INPUT FREQUENCY (Hz)
1
C
80
70
60
50
40
30
20
10
0
10
100
1419 G09
1000
10000
LTC1419
+A
IN
–A
IN
ANALOG INPUT
V
REF
0V TO
5V
REFCOMP
AGND
1419 F10
1
2
3
±
2.5V
4
5
10
μ
F
–
+
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